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* Restructured foldersLeonard Kugis2020-07-2819-3548/+94
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* GeneralLeonard Kugis2020-06-217-144/+169
| | | | Added real world units for capacitors and resistors.
* Finished PCBLeonard Kugis2020-02-044-1/+2566
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* Optimized layoutLeonard Kugis2020-02-042-115/+23
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* Merge branch 'master' of collaborating.tuhh.de:cev7691/pinlockLeonard Kugis2020-02-042-6/+35
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| * CrystalLeonard Kugis2020-01-237-41/+86
| | | | | | | | Replaced crystal with available ABM3B.
* | LayoutLeonard Kugis2020-02-0416-3039/+715
|/ | | | | Optimizations. Changed packaging of some parts.
* GeneralLeonard Kugis2020-01-038-4196/+4707
| | | | Fixed incorrect displays not matching.
* Merge branch 'master' of collaborating.tuhh.de:cev7691/pinlockLeonard Kugis2019-11-250-0/+0
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| * .gitignoreLeonard Kugis2019-11-251-0/+1
| | | | | | | | Added fabrication outputs to gitignore.
| * LayoutLeonard Kugis2019-11-251-1/+841
| | | | | | | | Added ground plane.
| * FreeroutingLeonard Kugis2019-11-254-6386/+8279
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* | filled groundLeonard Kugis2019-11-251-10/+2640
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* | FreeroutingLeonard Kugis2019-11-253-23/+117
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* | LayoutLeonard Kugis2019-11-251-108/+108
| | | | | | | | Placement corrections.
* | Larger pin headersLeonard Kugis2019-11-2510-9793/+9694
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* Schematic, LayoutLeonard Kugis2019-11-2510-4107/+4145
| | | | | Changed Barrel Jack pinout. Layout components placed.
* Layout not fitting yet, needs improvementLeonard Kugis2019-11-2411-1431/+7143
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* Begin associationsLeonard Kugis2019-11-248-244/+552
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* GeneralLeonard Kugis2019-11-249-3141/+1506
| | | | Added references to all elements.
* Begin renamingLeonard Kugis2019-11-214-64/+88
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* UARTLeonard Kugis2019-11-209-9216/+9152
| | | | | Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally.
* GeneralLeonard Kugis2019-11-199-10368/+9216
| | | | Removed too many test points.
* .Leonard Kugis2019-11-131-1/+55
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* Schematic, mainLeonard Kugis2019-11-132-366/+716
| | | | Added capacitors for subschematics.
* Schematic, generalLeonard Kugis2019-11-138-1873/+5555
| | | | | Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere.
* Schematic, UARTLeonard Kugis2019-11-133-478/+998
| | | | Added connectors for UART access.
* Schematic, mainLeonard Kugis2019-11-133-497/+1024
| | | | | | Added pull resistors to every pin of uC. Restructured main schematic. Added ISP interface.
* Schematic, mainLeonard Kugis2019-11-132-65/+340
| | | | | Added capacitor in parallel to reset switch to reduce sensitivity and oscillations.
* Schematic, main, generalLeonard Kugis2019-11-139-1067/+3179
| | | | | | Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
* Schematic, StatusLeonard Kugis2019-11-076-209/+510
| | | | Separated logic IO from power with transistors.
* Schematic, JTAGLeonard Kugis2019-11-076-1117/+1194
| | | | Added JTAG interface.
* Removed untracked filesLeonard Kugis2019-11-071-1/+0
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* Added .gitignoreLeonard Kugis2019-11-071-0/+42
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* Schematic, PinoutLeonard Kugis2019-11-076-1454/+1454
| | | | | Moved buttons and status interface to Port D to prepare Port C as JTAG interface.
* Add README.mdLeonard Kugis2019-11-041-0/+3
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* Add LICENSELeonard Kugis2019-11-041-0/+674
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* LayoutLeonard Kugis2019-11-043-294/+106
| | | | Minor layout fix.
* structure, buttons, statusLeonard Kugis2019-11-0410-602/+2091
| | | | | | Implemented hierarchy. Added button interface. Added status interface.
* SchematicLeonard Kugis2019-11-033-90/+919
| | | | | | Added Power wirings and connectors. Added 7-segment display output components and wiring to schematic. Added shift registers for button inputs.
* Initial commitLeonard Kugis2019-11-015-0/+385
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