pinlock.git - Pin protected lock system hardware (KiCAD), software (AVR assembly)

	Commit message (Collapse)	Author	Age	Files	Lines
*	Layout	Leonard Kugis	2020-02-04	1	-1/+0
\| \| \| \| \|	Optimizations. Changed packaging of some parts.
*	General	Leonard Kugis	2020-01-03	1	-1/+1
\| \| \| \|	Fixed incorrect displays not matching.
*	Larger pin headers	Leonard Kugis	2019-11-25	1	-200/+200
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*	Layout not fitting yet, needs improvement	Leonard Kugis	2019-11-24	1	-5/+5
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*	Begin associations	Leonard Kugis	2019-11-24	1	-2/+2
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*	General	Leonard Kugis	2019-11-24	1	-11/+11
\| \| \| \|	Added references to all elements.
*	UART	Leonard Kugis	2019-11-20	1	-200/+200
\| \| \| \| \|	Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally.
*	General	Leonard Kugis	2019-11-19	1	-328/+200
\| \| \| \|	Removed too many test points.
*	Schematic, general	Leonard Kugis	2019-11-13	1	-104/+232
\| \| \| \| \|	Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere.
*	Schematic, main, general	Leonard Kugis	2019-11-13	1	-110/+127
\| \| \| \| \| \|	Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
*	Schematic, JTAG	Leonard Kugis	2019-11-07	1	-183/+183
\| \| \| \|	Added JTAG interface.
*	structure, buttons, status	Leonard Kugis	2019-11-04	1	-0/+183
	Implemented hierarchy. Added button interface. Added status interface.