| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Schematic, general | Leonard Kugis | 2019-11-13 | 1 | -104/+232 |
| | | | | | | Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere. | ||||
| * | Schematic, main, general | Leonard Kugis | 2019-11-13 | 1 | -110/+127 |
| | | | | | | | Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors. | ||||
| * | Schematic, JTAG | Leonard Kugis | 2019-11-07 | 1 | -183/+183 |
| | | | | | Added JTAG interface. | ||||
| * | structure, buttons, status | Leonard Kugis | 2019-11-04 | 1 | -0/+183 |
| Implemented hierarchy. Added button interface. Added status interface. | |||||
 |
index : pinlock.git | |
| Pin protected lock system hardware (KiCAD), software (AVR assembly) |
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path: root/buttons.sch-bak