From 0ce1b0d50c53cd1e251b874135812aec3f2fb26c Mon Sep 17 00:00:00 2001 From: Ataberk Olgun Date: Sun, 28 May 2023 12:10:44 +0200 Subject: Update README.md to make it clear a programming cable is necessary --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 5526f4b..df7f649 100644 --- a/README.md +++ b/README.md @@ -67,6 +67,7 @@ We plan to open source the following prior research works that used DRAM Bender - A Linux Host Machine, (We tested on Ubuntu 16.04, 18.04, 20.04) - DRAM Bender uses an 8-lane PCIe interface to communicate with the Host Machine. So, you would also need to attach the board to the 8x/16x PCIe slot on the motherboard of the Host Machine - One of the four FPGA boards: Bittware XUSP3S, XUPP3R, XUPVVH, Xilinx Alveo U200 + - These boards should be connected to the host machine via a programming cable. Please refer to manufacturer data sheets for more information on how to use the programming cable. - A proper form factor memory attached to your FPGA board - If you want to build your own bitfile from the source: - Xilinx Vivado 2018.2 for the XUSP3S and XUPP3R boards -- cgit v1.2.3