From dc0b3db1b4f1895a07e5fe280ee3790e87f97b9f Mon Sep 17 00:00:00 2001
From: Ataberk <olgunataberk@gmail.com>
Date: Sun, 25 Sep 2022 17:22:03 +0200
Subject: Initial commit

---
 prebuilt/XUPVVH/XUPVVH_C1_RDIMM_1R_x4.ltx | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 prebuilt/XUPVVH/XUPVVH_C1_RDIMM_1R_x4.ltx

(limited to 'prebuilt/XUPVVH/XUPVVH_C1_RDIMM_1R_x4.ltx')

diff --git a/prebuilt/XUPVVH/XUPVVH_C1_RDIMM_1R_x4.ltx b/prebuilt/XUPVVH/XUPVVH_C1_RDIMM_1R_x4.ltx
new file mode 100644
index 0000000..3afbade
--- /dev/null
+++ b/prebuilt/XUPVVH/XUPVVH_C1_RDIMM_1R_x4.ltx
@@ -0,0 +1,32 @@
+{
+    "ltx_root": {
+        "version": 4,
+        "minor": 0,
+        "ltx_data": [
+            {
+                "name": "EDA_PROBESET",
+                "active": true,
+                "debug_cores": [
+                    {
+                        "type": "XSDB_V3",
+                        "name": "dbg_hub",
+                        "spec": "labtools_xsdbm_v3",
+                        "clk_input_freq_hz": "41666666"
+                    },
+                    {
+                        "type": "XSDBS_V2",
+                        "name": "phy_ddr4_i",
+                        "spec": "labtools_xsdbslavelib_v2",
+                        "ipName": "DDR4_SDRAM",
+                        "core_location": {
+                            "user_chain": 1,
+                            "slave_index": 0,
+                            "bscan_switch_index": 0
+                        },
+                        "uuid": "A4798F5A1DC8569B9C8CB73395566903"
+                    }
+                ]
+            }
+        ]
+    }
+}
\ No newline at end of file
-- 
cgit v1.2.3