From 7721980589f4c7fa811689e815a77d63f2556497 Mon Sep 17 00:00:00 2001 From: Ataberk Date: Thu, 2 May 2024 17:22:05 +0200 Subject: Add sources for U50 HBM2 --- .../U50-HBM/U50-HBM.srcs/sim_1/new/sim_tb_top.v | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 projects/U50-HBM/U50-HBM.srcs/sim_1/new/sim_tb_top.v (limited to 'projects/U50-HBM/U50-HBM.srcs/sim_1/new') diff --git a/projects/U50-HBM/U50-HBM.srcs/sim_1/new/sim_tb_top.v b/projects/U50-HBM/U50-HBM.srcs/sim_1/new/sim_tb_top.v new file mode 100644 index 0000000..0f3824f --- /dev/null +++ b/projects/U50-HBM/U50-HBM.srcs/sim_1/new/sim_tb_top.v @@ -0,0 +1,43 @@ +`timescale 1ps / 1ps + +module sim_tb_top; + + // common signals + reg c0_sys_clk_p; + reg c0_sys_clk_n; + reg sys_rst_l; + + softmc_top UUT( + .c0_sys_clk_p(c0_sys_clk_p), + .c0_sys_clk_n(c0_sys_clk_n), + .sys_rst_l(sys_rst_l) + + ); + + initial + c0_sys_clk_p = 1'b0; + always + c0_sys_clk_p = #(10000/2.0) ~c0_sys_clk_p; + + initial + c0_sys_clk_n = 1'b1; + always + c0_sys_clk_n = #(10000/2.0) ~c0_sys_clk_n; + + + initial begin + sys_rst_l = 1'b0; + #200000; + sys_rst_l = 1'b0; + #4500000; + sys_rst_l = 1'b1; + end + + + + + + + + +endmodule -- cgit v1.2.3