From dc0b3db1b4f1895a07e5fe280ee3790e87f97b9f Mon Sep 17 00:00:00 2001 From: Ataberk Date: Sun, 25 Sep 2022 17:22:03 +0200 Subject: Initial commit --- .../sim_scripts/scratchpad/xcelium/run.f | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/xcelium/run.f (limited to 'projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/xcelium/run.f') diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/xcelium/run.f b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/xcelium/run.f new file mode 100644 index 0000000..801f9d7 --- /dev/null +++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/xcelium/run.f @@ -0,0 +1,18 @@ +-makelib xcelium_lib/xpm -sv \ + "/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ + "/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ + "/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ +-endlib +-makelib xcelium_lib/xpm \ + "/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_VCOMP.vhd" \ +-endlib +-makelib xcelium_lib/blk_mem_gen_v8_4_4 \ + "../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ +-endlib +-makelib xcelium_lib/xil_defaultlib \ + "../../../../XUPVVH.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ +-endlib +-makelib xcelium_lib/xil_defaultlib \ + glbl.v +-endlib + -- cgit v1.2.3