| Age | Commit message (Collapse) | Author | Lines | |
|---|---|---|---|---|
| 2019-11-25 | Schematic, Layout | Leonard Kugis | -4107/+4145 | |
| Changed Barrel Jack pinout. Layout components placed. | ||||
| 2019-11-24 | Layout not fitting yet, needs improvement | Leonard Kugis | -1431/+7143 | |
| 2019-11-24 | Begin associations | Leonard Kugis | -244/+552 | |
| 2019-11-24 | General | Leonard Kugis | -3141/+1506 | |
| Added references to all elements. | ||||
| 2019-11-21 | Begin renaming | Leonard Kugis | -64/+88 | |
| 2019-11-20 | UART | Leonard Kugis | -9216/+9152 | |
| Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally. | ||||
| 2019-11-19 | General | Leonard Kugis | -10368/+9216 | |
| Removed too many test points. | ||||
| 2019-11-13 | . | Leonard Kugis | -1/+55 | |
| 2019-11-13 | Schematic, main | Leonard Kugis | -366/+716 | |
| Added capacitors for subschematics. | ||||
| 2019-11-13 | Schematic, general | Leonard Kugis | -1873/+5555 | |
| Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere. | ||||
| 2019-11-13 | Schematic, UART | Leonard Kugis | -478/+998 | |
| Added connectors for UART access. | ||||
| 2019-11-13 | Schematic, main | Leonard Kugis | -497/+1024 | |
| Added pull resistors to every pin of uC. Restructured main schematic. Added ISP interface. | ||||
| 2019-11-13 | Schematic, main | Leonard Kugis | -65/+340 | |
| Added capacitor in parallel to reset switch to reduce sensitivity and oscillations. | ||||
| 2019-11-13 | Schematic, main, general | Leonard Kugis | -1067/+3179 | |
| Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors. | ||||
| 2019-11-07 | Schematic, Status | Leonard Kugis | -209/+510 | |
| Separated logic IO from power with transistors. | ||||
| 2019-11-07 | Schematic, JTAG | Leonard Kugis | -1117/+1194 | |
| Added JTAG interface. | ||||
| 2019-11-07 | Removed untracked files | Leonard Kugis | -1/+0 | |
| 2019-11-07 | Added .gitignore | Leonard Kugis | -0/+42 | |
| 2019-11-07 | Schematic, Pinout | Leonard Kugis | -1454/+1454 | |
| Moved buttons and status interface to Port D to prepare Port C as JTAG interface. | ||||
| 2019-11-04 | Add README.md | Leonard Kugis | -0/+3 | |
| 2019-11-04 | Add LICENSE | Leonard Kugis | -0/+674 | |
| 2019-11-04 | Layout | Leonard Kugis | -294/+106 | |
| Minor layout fix. | ||||
| 2019-11-04 | structure, buttons, status | Leonard Kugis | -602/+2091 | |
| Implemented hierarchy. Added button interface. Added status interface. | ||||
| 2019-11-03 | Schematic | Leonard Kugis | -90/+919 | |
| Added Power wirings and connectors. Added 7-segment display output components and wiring to schematic. Added shift registers for button inputs. | ||||
| 2019-11-01 | Initial commit | Leonard Kugis | -0/+385 | |
 |
index : pinlock.git | |
| Pin protected lock system hardware (KiCAD), software (AVR assembly) |
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