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2020-08-28SoftwareLeonard Kugis-0/+1457
Implemented basic functionality.
2020-07-28Restructured foldersLeonard Kugis-3548/+94
2020-06-21GeneralLeonard Kugis-144/+169
Added real world units for capacitors and resistors.
2020-02-04Finished PCBLeonard Kugis-1/+2566
2020-02-04Optimized layoutLeonard Kugis-115/+23
2020-02-04Merge branch 'master' of collaborating.tuhh.de:cev7691/pinlockLeonard Kugis-6/+35
2020-02-04LayoutLeonard Kugis-3039/+715
Optimizations. Changed packaging of some parts.
2020-01-23CrystalLeonard Kugis-41/+86
Replaced crystal with available ABM3B.
2020-01-03GeneralLeonard Kugis-4196/+4707
Fixed incorrect displays not matching.
2019-11-25Merge branch 'master' of collaborating.tuhh.de:cev7691/pinlockLeonard Kugis-0/+0
2019-11-25filled groundLeonard Kugis-10/+2640
2019-11-25FreeroutingLeonard Kugis-23/+117
2019-11-25LayoutLeonard Kugis-108/+108
Placement corrections.
2019-11-25Larger pin headersLeonard Kugis-9793/+9694
2019-11-25.gitignoreLeonard Kugis-0/+1
Added fabrication outputs to gitignore.
2019-11-25LayoutLeonard Kugis-1/+841
Added ground plane.
2019-11-25FreeroutingLeonard Kugis-6386/+8279
2019-11-25Schematic, LayoutLeonard Kugis-4107/+4145
Changed Barrel Jack pinout. Layout components placed.
2019-11-24Layout not fitting yet, needs improvementLeonard Kugis-1431/+7143
2019-11-24Begin associationsLeonard Kugis-244/+552
2019-11-24GeneralLeonard Kugis-3141/+1506
Added references to all elements.
2019-11-21Begin renamingLeonard Kugis-64/+88
2019-11-20UARTLeonard Kugis-9216/+9152
Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally.
2019-11-19GeneralLeonard Kugis-10368/+9216
Removed too many test points.
2019-11-13.Leonard Kugis-1/+55
2019-11-13Schematic, mainLeonard Kugis-366/+716
Added capacitors for subschematics.
2019-11-13Schematic, generalLeonard Kugis-1873/+5555
Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere.
2019-11-13Schematic, UARTLeonard Kugis-478/+998
Added connectors for UART access.
2019-11-13Schematic, mainLeonard Kugis-497/+1024
Added pull resistors to every pin of uC. Restructured main schematic. Added ISP interface.
2019-11-13Schematic, mainLeonard Kugis-65/+340
Added capacitor in parallel to reset switch to reduce sensitivity and oscillations.
2019-11-13Schematic, main, generalLeonard Kugis-1067/+3179
Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
2019-11-07Schematic, StatusLeonard Kugis-209/+510
Separated logic IO from power with transistors.
2019-11-07Schematic, JTAGLeonard Kugis-1117/+1194
Added JTAG interface.
2019-11-07Removed untracked filesLeonard Kugis-1/+0
2019-11-07Added .gitignoreLeonard Kugis-0/+42
2019-11-07Schematic, PinoutLeonard Kugis-1454/+1454
Moved buttons and status interface to Port D to prepare Port C as JTAG interface.
2019-11-04Add README.mdLeonard Kugis-0/+3
2019-11-04Add LICENSELeonard Kugis-0/+674
2019-11-04LayoutLeonard Kugis-294/+106
Minor layout fix.
2019-11-04structure, buttons, statusLeonard Kugis-602/+2091
Implemented hierarchy. Added button interface. Added status interface.
2019-11-03SchematicLeonard Kugis-90/+919
Added Power wirings and connectors. Added 7-segment display output components and wiring to schematic. Added shift registers for button inputs.
2019-11-01Initial commitLeonard Kugis-0/+385
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