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2019-11-25Schematic, LayoutLeonard Kugis-540/+540
Changed Barrel Jack pinout. Layout components placed.
2019-11-24Layout not fitting yet, needs improvementLeonard Kugis-65/+51
2019-11-24Begin associationsLeonard Kugis-0/+23
2019-11-24GeneralLeonard Kugis-31/+28
Added references to all elements.
2019-11-20UARTLeonard Kugis-528/+534
Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally.
2019-11-19GeneralLeonard Kugis-528/+528
Removed too many test points.
2019-11-13Schematic, generalLeonard Kugis-0/+17
Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere.
2019-11-13Schematic, UARTLeonard Kugis-0/+20
Added connectors for UART access.
2019-11-13Schematic, mainLeonard Kugis-13/+28
Added pull resistors to every pin of uC. Restructured main schematic. Added ISP interface.
2019-11-13Schematic, main, generalLeonard Kugis-26/+74
Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
2019-11-07Schematic, StatusLeonard Kugis-0/+19
Separated logic IO from power with transistors.
2019-11-07Schematic, JTAGLeonard Kugis-0/+35
Added JTAG interface.
2019-11-07Schematic, PinoutLeonard Kugis-374/+374
Moved buttons and status interface to Port D to prepare Port C as JTAG interface.
2019-11-04structure, buttons, statusLeonard Kugis-27/+66
Implemented hierarchy. Added button interface. Added status interface.
2019-11-03SchematicLeonard Kugis-0/+151
Added Power wirings and connectors. Added 7-segment display output components and wiring to schematic. Added shift registers for button inputs.
2019-11-01Initial commitLeonard Kugis-0/+184
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