| Age | Commit message (Collapse) | Author | Lines | |
|---|---|---|---|---|
| 2019-11-24 | Layout not fitting yet, needs improvement | Leonard Kugis | -421/+192 | |
| 2019-11-24 | General | Leonard Kugis | -262/+78 | |
| Added references to all elements. | ||||
| 2019-11-20 | UART | Leonard Kugis | -873/+761 | |
| Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally. | ||||
| 2019-11-19 | General | Leonard Kugis | -873/+873 | |
| Removed too many test points. | ||||
| 2019-11-13 | Schematic, main | Leonard Kugis | -365/+661 | |
| Added capacitors for subschematics. | ||||
| 2019-11-13 | Schematic, main, general | Leonard Kugis | -156/+419 | |
| Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors. | ||||
| 2019-11-07 | Schematic, JTAG | Leonard Kugis | -314/+314 | |
| Added JTAG interface. | ||||
| 2019-11-07 | Schematic, Pinout | Leonard Kugis | -27/+27 | |
| Moved buttons and status interface to Port D to prepare Port C as JTAG interface. | ||||
| 2019-11-04 | structure, buttons, status | Leonard Kugis | -0/+314 | |
| Implemented hierarchy. Added button interface. Added status interface. | ||||
 |
index : pinlock.git | |
| Pin protected lock system hardware (KiCAD), software (AVR assembly) |
| summaryrefslogtreecommitdiffstats |
path: root/status.sch-bak