pinlock.git - Pin protected lock system hardware (KiCAD), software (AVR assembly)

Age	Commit message (Collapse)	Author	Lines
2019-11-25	Schematic, Layout	Leonard Kugis	-348/+348
	Changed Barrel Jack pinout. Layout components placed.
2019-11-24	Layout not fitting yet, needs improvement	Leonard Kugis	-421/+192

2019-11-24	Begin associations	Leonard Kugis	-9/+9

2019-11-24	General	Leonard Kugis	-262/+78
	Added references to all elements.
2019-11-20	UART	Leonard Kugis	-761/+761
	Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally.
2019-11-19	General	Leonard Kugis	-873/+761
	Removed too many test points.
2019-11-13	Schematic, general	Leonard Kugis	-365/+661
	Added test points everywhere neccessary. Added missing pull resistors to guarantee a defined state everywhere.
2019-11-13	Schematic, main, general	Leonard Kugis	-308/+341
	Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
2019-11-07	Schematic, Status	Leonard Kugis	-110/+340
	Separated logic IO from power with transistors.
2019-11-07	Schematic, Pinout	Leonard Kugis	-314/+314
	Moved buttons and status interface to Port D to prepare Port C as JTAG interface.
2019-11-04	Layout	Leonard Kugis	-27/+27
	Minor layout fix.
2019-11-04	structure, buttons, status	Leonard Kugis	-0/+314
	Implemented hierarchy. Added button interface. Added status interface.