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AgeCommit message (Expand)AuthorLines
2021-01-25Define PCB layersLeonard Kugis-0/+1
2021-01-24Add SDIO interface with connector and pull-up resistorsLeonard Kugis-1/+271
2021-01-24Initialize PCB layout with basic parametersLeonard Kugis-1/+2
2021-01-23Create SDIO interface schematic stubLeonard Kugis-0/+1
2021-01-23Add complete power schematic with voltage regulatorsLeonard Kugis-2/+296
2021-01-22Add complete main schematic with FPGA and componentsLeonard Kugis-1/+1296
2021-01-22Initialize PCB layout fileLeonard Kugis-0/+1
2021-01-22Extend power schematic with basic structureLeonard Kugis-0/+1
2021-01-21Add power schematic stubLeonard Kugis-0/+1
2021-01-21Start main schematic with root sheetLeonard Kugis-0/+35
2021-01-20Create initial project fileLeonard Kugis-0/+1
2021-01-20Add component libraries (symbols and footprints)Leonard Kugis-0/+27042
2021-01-20Add symbol library tableLeonard Kugis-0/+13
2021-01-20Add initial footprint library tableLeonard Kugis-0/+13