| Age | Commit message (Collapse) | Author | Lines | |
|---|---|---|---|---|
| 2021-02-03 | Route SD_CLK signal with via for layer change | Leonard Kugis | -0/+3 | |
| 2021-02-02 | Add GND routing on bottom layer | Leonard Kugis | -0/+2 | |
| 2021-02-02 | Route VCC3V3 power trace between components | Leonard Kugis | -0/+2 | |
| 2021-02-01 | Add SDIO signal nets for memory interface | Leonard Kugis | -0/+3 | |
| 2021-01-28 | Define power nets VCC3V3 and GND | Leonard Kugis | -0/+3 | |
| 2021-01-26 | Place FPGA component on PCB | Leonard Kugis | -0/+1 | |
| 2021-01-25 | Set PCB design rules | Leonard Kugis | -0/+1 | |
| 2021-01-25 | Define PCB layers | Leonard Kugis | -0/+1 | |
| 2021-01-24 | Initialize PCB layout with basic parameters | Leonard Kugis | -1/+2 | |
| 2021-01-22 | Initialize PCB layout file | Leonard Kugis | -0/+1 | |
 |
index : turboswap.git | |
| Memory mapped expansion module for XZ2C |
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path: root/TurboSwap.kicad_pcb