From 2a417062ea5e6ec92bda526ccae4b864e7206561 Mon Sep 17 00:00:00 2001 From: Leonard Kugis Date: Wed, 3 Feb 2021 14:55:06 +0000 Subject: Route SD_CLK signal with via for layer change --- TurboSwap.kicad_pcb | 3 +++ 1 file changed, 3 insertions(+) (limited to 'TurboSwap.kicad_pcb') diff --git a/TurboSwap.kicad_pcb b/TurboSwap.kicad_pcb index 8471509..fb719f4 100644 --- a/TurboSwap.kicad_pcb +++ b/TurboSwap.kicad_pcb @@ -13,3 +13,6 @@ (segment (start 100 50) (end 150 50) (width 0.2) (layer F.Cu) (net 1)) (segment (start 50 55) (end 100 55) (width 0.2) (layer B.Cu) (net 2)) (segment (start 100 55) (end 150 55) (width 0.2) (layer B.Cu) (net 2)) +(segment (start 60 100) (end 60 80) (width 0.2) (layer F.Cu) (net 3)) +(segment (start 60 80) (end 80 80) (width 0.2) (layer F.Cu) (net 3)) +(via (at 80 80) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 3)) -- cgit v1.2.3