| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Schematic, main, general | Leonard Kugis | 2019-11-13 | 1 | -156/+419 |
| | | | | | | | Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors. | ||||
| * | Schematic, JTAG | Leonard Kugis | 2019-11-07 | 1 | -314/+314 |
| | | | | | Added JTAG interface. | ||||
| * | Schematic, Pinout | Leonard Kugis | 2019-11-07 | 1 | -27/+27 |
| | | | | | | Moved buttons and status interface to Port D to prepare Port C as JTAG interface. | ||||
| * | structure, buttons, status | Leonard Kugis | 2019-11-04 | 1 | -0/+314 |
| Implemented hierarchy. Added button interface. Added status interface. | |||||
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index : pinlock.git | |
| Pin protected lock system hardware (KiCAD), software (AVR assembly) |
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path: root/status.sch-bak