pinlock.git - Pin protected lock system hardware (KiCAD), software (AVR assembly)

	Commit message (Collapse)	Author	Age	Files	Lines
*	Restructured folders	Leonard Kugis	2020-07-28	1	-347/+0
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*	Layout	Leonard Kugis	2020-02-04	1	-1/+0
\| \| \| \| \|	Optimizations. Changed packaging of some parts.
*	Larger pin headers	Leonard Kugis	2019-11-25	1	-348/+348
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*	Layout not fitting yet, needs improvement	Leonard Kugis	2019-11-24	1	-421/+192
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*	General	Leonard Kugis	2019-11-24	1	-262/+78
\| \| \| \|	Added references to all elements.
*	UART	Leonard Kugis	2019-11-20	1	-873/+761
\| \| \| \| \|	Changed UART from 2 to 4 pin connector, connecting GND and VCC additionally.
*	General	Leonard Kugis	2019-11-19	1	-873/+873
\| \| \| \|	Removed too many test points.
*	Schematic, main	Leonard Kugis	2019-11-13	1	-365/+661
\| \| \| \|	Added capacitors for subschematics.
*	Schematic, main, general	Leonard Kugis	2019-11-13	1	-156/+419
\| \| \| \| \| \|	Added pull resistors to all ports. Added capacitors for all components to prevent high switching currents. Reordered status LEDs and transistors.
*	Schematic, JTAG	Leonard Kugis	2019-11-07	1	-314/+314
\| \| \| \|	Added JTAG interface.
*	Schematic, Pinout	Leonard Kugis	2019-11-07	1	-27/+27
\| \| \| \| \|	Moved buttons and status interface to Port D to prepare Port C as JTAG interface.
*	structure, buttons, status	Leonard Kugis	2019-11-04	1	-0/+314
	Implemented hierarchy. Added button interface. Added status interface.