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| author | ataberk <ataberk.olgun@safari.ethz.ch> | 2025-08-10 13:54:41 +0200 |
|---|---|---|
| committer | ataberk <ataberk.olgun@safari.ethz.ch> | 2025-08-10 13:54:41 +0200 |
| commit | 81860f141ca3103663be80279b3dff7f34cd8fc2 (patch) | |
| tree | 1bea65d4f55f27a6f7466859849704c6b38c0428 /projects/U50-HBM/U50-HBM.sim/sim_1/behav/questa/modelsim.ini | |
| parent | 2ed3d43dc3af4fd7498d7782c7072e5e8209a88f (diff) | |
| download | dram-bender-81860f141ca3103663be80279b3dff7f34cd8fc2.tar.gz | |
fix write to precharge latency to be compliant with the standard
Diffstat (limited to 'projects/U50-HBM/U50-HBM.sim/sim_1/behav/questa/modelsim.ini')
0 files changed, 0 insertions, 0 deletions