aboutsummaryrefslogtreecommitdiffstats
path: root/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim
diff options
context:
space:
mode:
authorAtaberk <olgunataberk@gmail.com>2022-09-25 17:22:03 +0200
committerAtaberk <olgunataberk@gmail.com>2022-09-25 17:22:03 +0200
commitdc0b3db1b4f1895a07e5fe280ee3790e87f97b9f (patch)
treeb47203aa281bdd959def4451c84d310cd9cf2e12 /projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim
downloaddram-bender-dc0b3db1b4f1895a07e5fe280ee3790e87f97b9f.tar.gz
Initial commit
Diffstat (limited to 'projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim')
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/README.txt49
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/XUPVVH.smi30
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/cmd.tcl12
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/file_info.txt50
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/glbl.v71
-rwxr-xr-xprojects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/phy_ddr4.sh214
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/protoinst_files/bd_9f2c.protoinst9
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vhdl.prj12
-rw-r--r--projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vlog.prj47
9 files changed, 494 insertions, 0 deletions
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/README.txt b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/README.txt
new file mode 100644
index 0000000..838f0e1
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/README.txt
@@ -0,0 +1,49 @@
+################################################################################
+# Vivado (TM) v2019.2 (64-bit)
+#
+# README.txt: Please read the sections below to understand the steps required to
+# run the exported script and information about the source files.
+#
+# Generated by export_simulation on Sun Oct 18 14:23:04 +03 2020
+#
+################################################################################
+
+1. How to run the generated simulation script:-
+
+From the shell prompt in the current directory, issue the following command:-
+
+./phy_ddr4.sh
+
+This command will launch the 'compile', 'elaborate' and 'simulate' functions
+implemented in the script file for the 3-step flow. These functions are called
+from the main 'run' function in the script file.
+
+The 'run' function first executes the 'setup' function, the purpose of which is to
+create simulator specific setup files, create design library mappings and library
+directories and copy 'glbl.v' from the Vivado software install location into the
+current directory.
+
+The 'setup' function is also used for removing the simulator generated data in
+order to reset the current directory to the original state when export_simulation
+was launched from Vivado. This generated data can be removed by specifying the
+'-reset_run' switch to the './phy_ddr4.sh' script.
+
+./phy_ddr4.sh -reset_run
+
+To keep the generated data from the previous run but regenerate the setup files and
+library directories, use the '-noclean_files' switch.
+
+./phy_ddr4.sh -noclean_files
+
+For more information on the script, please type './phy_ddr4.sh -help'.
+
+2. Additional design information files:-
+
+export_simulation generates following additional file that can be used for fetching
+the design files information or for integrating with external custom scripts.
+
+Name : file_info.txt
+Purpose: This file contains detail design file information based on the compile order
+ when export_simulation was executed from Vivado. The file contains information
+ about the file type, name, whether it is part of the IP, associated library
+ and the file path information.
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/XUPVVH.smi b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/XUPVVH.smi
new file mode 100644
index 0000000..7951bb9
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/XUPVVH.smi
@@ -0,0 +1,30 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Product Version: Vivado v2019.2 (64-bit) -->
+<!-- SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019 -->
+<!-- -->
+<!-- Copyright 1986-2019 Xilinx, Inc. All Rights Reserved. -->
+<!-- Nov 6 2019 -->
+<!-- -->
+<!-- This file is generated by the software with the Tcl write_mem_info command. -->
+<!-- Do not edit this file. -->
+
+<MemInfoSimulation Version="1" Minor="1">
+ <Processor Endianness="Little" InstPath="phy_ddr4_i/inst/u_ddr_cal_riu/mcs0/inst/microblaze_I">
+ <AddressSpace Name="phy_ddr4_i_inst_u_ddr_cal_riu_mcs0_inst_microblaze_I.phy_ddr4_i_inst_u_ddr_cal_riu_mcs0_inst_lmb_bram_I_ADDR_SPACE" ECC="NONE" Begin="0" End="98303">
+ <BusBlock>
+ <BitLane MemType="lmb_bram_I_MEM_DEVICE" MemType_DataWidth="32" MemType_AddressDepth="98303">
+ <DataWidth MSB="31" LSB="0"/>
+ <AddressRange Begin="0" End="16383"/>
+ <Parity ON="false" NumBits="0"/>
+ <MemFile Name="bd_9f2c_lmb_bram_I_0.mem"/>
+ </BitLane>
+ </BusBlock>
+ </AddressSpace>
+ </Processor>
+ <Config>
+ <Option Name="Part" Val="xcvu37p-fsvh2892-2-e"/>
+ </Config>
+ <DRC>
+ <Rule Name="RDADDRCHANGE" Val="false"/>
+ </DRC>
+</MemInfoSimulation>
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/cmd.tcl b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/cmd.tcl
new file mode 100644
index 0000000..eef7a0f
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/cmd.tcl
@@ -0,0 +1,12 @@
+set curr_wave [current_wave_config]
+if { [string length $curr_wave] == 0 } {
+ if { [llength [get_objects]] > 0} {
+ add_wave /
+ set_property needs_save false [current_wave_config]
+ } else {
+ send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+ }
+}
+
+run -all
+quit
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/file_info.txt b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/file_info.txt
new file mode 100644
index 0000000..43d214f
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/file_info.txt
@@ -0,0 +1,50 @@
+bd_9f2c_microblaze_I_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_0/sim/bd_9f2c_microblaze_I_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_rst_0_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_1/sim/bd_9f2c_rst_0_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_ilmb_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_2/sim/bd_9f2c_ilmb_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_dlmb_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_3/sim/bd_9f2c_dlmb_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_dlmb_cntlr_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_4/sim/bd_9f2c_dlmb_cntlr_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_ilmb_cntlr_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_5/sim/bd_9f2c_ilmb_cntlr_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_lmb_bram_I_0.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_6/sim/bd_9f2c_lmb_bram_I_0.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_second_dlmb_cntlr_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_7/sim/bd_9f2c_second_dlmb_cntlr_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_second_ilmb_cntlr_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_8/sim/bd_9f2c_second_ilmb_cntlr_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_second_lmb_bram_I_0.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_9/sim/bd_9f2c_second_lmb_bram_I_0.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c_iomodule_0_0.vhd,vhdl,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_10/sim/bd_9f2c_iomodule_0_0.vhd,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+bd_9f2c.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/sim/bd_9f2c.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+phy_ddr4_microblaze_mcs.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_0/sim/phy_ddr4_microblaze_mcs.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+phy_ddr4_phy_ddr4.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/phy/phy_ddr4_phy_ddr4.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_xiphy_behav.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/phy/ddr4_phy_v2_2_xiphy_behav.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_xiphy.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/phy/ddr4_phy_v2_2_xiphy.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_iob_byte.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/iob/ddr4_phy_v2_2_iob_byte.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_iob.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/iob/ddr4_phy_v2_2_iob.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_pll.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/clocking/ddr4_phy_v2_2_pll.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_xiphy_tristate_wrapper.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_tristate_wrapper.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_xiphy_riuor_wrapper.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_riuor_wrapper.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_xiphy_control_wrapper.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_control_wrapper.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_xiphy_byte_wrapper.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_byte_wrapper.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_phy_v2_2_xiphy_bitslice_wrapper.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_bitslice_wrapper.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+phy_ddr4_phy.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/ip_top/phy_ddr4_phy.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_infrastructure.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/clocking/ddr4_v2_2_infrastructure.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_xsdb_bram.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_xsdb_bram.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_write.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_write.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_wr_byte.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_wr_byte.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_wr_bit.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_wr_bit.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_sync.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_sync.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_read.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_read.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_rd_en.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_rd_en.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_pi.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_pi.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_mc_odt.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_mc_odt.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_debug_microblaze.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_debug_microblaze.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_cplx_data.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_cplx_data.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_cplx.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_cplx.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_config_rom.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_config_rom.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_addr_decode.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_addr_decode.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_top.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_top.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal_xsdb_arbiter.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_xsdb_arbiter.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_cal.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_chipscope_xsdb_slave.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_chipscope_xsdb_slave.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+ddr4_v2_2_dp_AB9.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_dp_AB9.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+phy_ddr4_ddr4.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top/phy_ddr4_ddr4.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+phy_ddr4_ddr4_cal_riu.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/phy_ddr4_ddr4_cal_riu.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+phy_ddr4.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top/phy_ddr4.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+microblaze_mcs_0.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/tb/microblaze_mcs_0.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top"incdir="../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal"
+glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/glbl.v b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/glbl.v
new file mode 100644
index 0000000..be64233
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/glbl.v
@@ -0,0 +1,71 @@
+// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
+`ifndef GLBL
+`define GLBL
+`timescale 1 ps / 1 ps
+
+module glbl ();
+
+ parameter ROC_WIDTH = 100000;
+ parameter TOC_WIDTH = 0;
+
+//-------- STARTUP Globals --------------
+ wire GSR;
+ wire GTS;
+ wire GWE;
+ wire PRLD;
+ tri1 p_up_tmp;
+ tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
+
+ wire PROGB_GLBL;
+ wire CCLKO_GLBL;
+ wire FCSBO_GLBL;
+ wire [3:0] DO_GLBL;
+ wire [3:0] DI_GLBL;
+
+ reg GSR_int;
+ reg GTS_int;
+ reg PRLD_int;
+
+//-------- JTAG Globals --------------
+ wire JTAG_TDO_GLBL;
+ wire JTAG_TCK_GLBL;
+ wire JTAG_TDI_GLBL;
+ wire JTAG_TMS_GLBL;
+ wire JTAG_TRST_GLBL;
+
+ reg JTAG_CAPTURE_GLBL;
+ reg JTAG_RESET_GLBL;
+ reg JTAG_SHIFT_GLBL;
+ reg JTAG_UPDATE_GLBL;
+ reg JTAG_RUNTEST_GLBL;
+
+ reg JTAG_SEL1_GLBL = 0;
+ reg JTAG_SEL2_GLBL = 0 ;
+ reg JTAG_SEL3_GLBL = 0;
+ reg JTAG_SEL4_GLBL = 0;
+
+ reg JTAG_USER_TDO1_GLBL = 1'bz;
+ reg JTAG_USER_TDO2_GLBL = 1'bz;
+ reg JTAG_USER_TDO3_GLBL = 1'bz;
+ reg JTAG_USER_TDO4_GLBL = 1'bz;
+
+ assign (strong1, weak0) GSR = GSR_int;
+ assign (strong1, weak0) GTS = GTS_int;
+ assign (weak1, weak0) PRLD = PRLD_int;
+
+ initial begin
+ GSR_int = 1'b1;
+ PRLD_int = 1'b1;
+ #(ROC_WIDTH)
+ GSR_int = 1'b0;
+ PRLD_int = 1'b0;
+ end
+
+ initial begin
+ GTS_int = 1'b1;
+ #(TOC_WIDTH)
+ GTS_int = 1'b0;
+ end
+
+endmodule
+`endif
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/phy_ddr4.sh b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/phy_ddr4.sh
new file mode 100755
index 0000000..5236476
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/phy_ddr4.sh
@@ -0,0 +1,214 @@
+#!/bin/bash -f
+#*********************************************************************************************************
+# Vivado (TM) v2019.2 (64-bit)
+#
+# Filename : phy_ddr4.sh
+# Simulator : Xilinx Vivado Simulator
+# Description : Simulation script for compiling, elaborating and verifying the project source files.
+# The script will automatically create the design libraries sub-directories in the run
+# directory, add the library logical mappings in the simulator setup file, create default
+# 'do/prj' file, execute compilation, elaboration and simulation steps.
+#
+# Generated by Vivado on Sun Oct 18 14:23:04 +03 2020
+# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
+#
+# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
+#
+# usage: phy_ddr4.sh [-help]
+# usage: phy_ddr4.sh [-lib_map_path]
+# usage: phy_ddr4.sh [-noclean_files]
+# usage: phy_ddr4.sh [-reset_run]
+#
+#*********************************************************************************************************
+
+# Command line options
+xv_boost_lib_path=/tools/Xilinx/Vivado/2019.2/tps/boost_1_64_0
+xvlog_opts="--relax"
+xvhdl_opts="--relax"
+
+
+# Script info
+echo -e "phy_ddr4.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
+
+# Main steps
+run()
+{
+ check_args $# $1
+ setup $1 $2
+ compile
+ elaborate
+ simulate
+}
+
+# RUN_STEP: <compile>
+compile()
+{
+ # Compile design files
+ xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
+ xvhdl $xvhdl_opts -prj vhdl.prj 2>&1 | tee compile.log
+
+}
+
+# RUN_STEP: <elaborate>
+elaborate()
+{
+ xelab --relax --debug typical --mt auto -L microblaze_v11_0_2 -L xil_defaultlib -L lib_cdc_v1_0_2 -L proc_sys_reset_v5_0_13 -L lmb_v10_v3_0_10 -L lmb_bram_if_cntlr_v4_0_17 -L blk_mem_gen_v8_4_4 -L iomodule_v3_1_5 -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot phy_ddr4 xil_defaultlib.phy_ddr4 xil_defaultlib.glbl -log elaborate.log
+}
+
+# RUN_STEP: <simulate>
+simulate()
+{
+ xsim phy_ddr4 -key {Behavioral:sim_1:Functional:phy_ddr4} -tclbatch cmd.tcl -protoinst "protoinst_files/bd_9f2c.protoinst" -log simulate.log
+}
+
+# STEP: setup
+setup()
+{
+ case $1 in
+ "-lib_map_path" )
+ if [[ ($2 == "") ]]; then
+ echo -e "ERROR: Simulation library directory path not specified (type \"./phy_ddr4.sh -help\" for more information)\n"
+ exit 1
+ fi
+ copy_setup_file $2
+ ;;
+ "-reset_run" )
+ reset_run
+ echo -e "INFO: Simulation run files deleted.\n"
+ exit 0
+ ;;
+ "-noclean_files" )
+ # do not remove previous data
+ ;;
+ * )
+ copy_setup_file $2
+ esac
+
+ # Add any setup/initialization commands here:-
+
+ # <user specific commands>
+
+}
+
+# Copy xsim.ini file
+copy_setup_file()
+{
+ file="xsim.ini"
+ lib_map_path="/tools/Xilinx/Vivado/2019.2/data/xsim"
+ if [[ ($1 != "") ]]; then
+ lib_map_path="$1"
+ fi
+ if [[ ($lib_map_path != "") ]]; then
+ src_file="$lib_map_path/$file"
+ if [[ -e $src_file ]]; then
+ cp $src_file .
+ fi
+
+ # Map local design libraries to xsim.ini
+ map_local_libs
+
+ fi
+}
+
+# Map local design libraries
+map_local_libs()
+{
+ updated_mappings=()
+ local_mappings=()
+
+ # Local design libraries
+ local_libs=()
+
+ if [[ 0 == ${#local_libs[@]} ]]; then
+ return
+ fi
+
+ file="xsim.ini"
+ file_backup="xsim.ini.bak"
+
+ if [[ -e $file ]]; then
+ rm -f $file_backup
+ # Create a backup copy of the xsim.ini file
+ cp $file $file_backup
+ # Read libraries from backup file and search in local library collection
+ while read -r line
+ do
+ IN=$line
+ # Split mapping entry with '=' delimiter to fetch library name and mapping
+ read lib_name mapping <<<$(IFS="="; echo $IN)
+ # If local library found, then construct the local mapping and add to local mapping collection
+ if `echo ${local_libs[@]} | grep -wq $lib_name` ; then
+ line="$lib_name=xsim.dir/$lib_name"
+ local_mappings+=("$lib_name")
+ fi
+ # Add to updated library mapping collection
+ updated_mappings+=("$line")
+ done < "$file_backup"
+ # Append local libraries not found originally from xsim.ini
+ for (( i=0; i<${#local_libs[*]}; i++ )); do
+ lib_name="${local_libs[i]}"
+ if `echo ${local_mappings[@]} | grep -wvq $lib_name` ; then
+ line="$lib_name=xsim.dir/$lib_name"
+ updated_mappings+=("$line")
+ fi
+ done
+ # Write updated mappings in xsim.ini
+ rm -f $file
+ for (( i=0; i<${#updated_mappings[*]}; i++ )); do
+ lib_name="${updated_mappings[i]}"
+ echo $lib_name >> $file
+ done
+ else
+ for (( i=0; i<${#local_libs[*]}; i++ )); do
+ lib_name="${local_libs[i]}"
+ mapping="$lib_name=xsim.dir/$lib_name"
+ echo $mapping >> $file
+ done
+ fi
+}
+
+# Delete generated data from the previous run
+reset_run()
+{
+ files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb phy_ddr4.wdb xsim.dir)
+ for (( i=0; i<${#files_to_remove[*]}; i++ )); do
+ file="${files_to_remove[i]}"
+ if [[ -e $file ]]; then
+ rm -rf $file
+ fi
+ done
+}
+
+# Check command line arguments
+check_args()
+{
+ if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
+ echo -e "ERROR: Unknown option specified '$2' (type \"./phy_ddr4.sh -help\" for more information)\n"
+ exit 1
+ fi
+
+ if [[ ($2 == "-help" || $2 == "-h") ]]; then
+ usage
+ fi
+}
+
+# Script usage
+usage()
+{
+ msg="Usage: phy_ddr4.sh [-help]\n\
+Usage: phy_ddr4.sh [-lib_map_path]\n\
+Usage: phy_ddr4.sh [-reset_run]\n\
+Usage: phy_ddr4.sh [-noclean_files]\n\n\
+[-help] -- Print help information for this script\n\n\
+[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
+using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
+[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
+from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
+-noclean_files switch.\n\n\
+[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
+ echo -e $msg
+ exit 1
+}
+
+# Launch script
+run $1 $2
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/protoinst_files/bd_9f2c.protoinst b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/protoinst_files/bd_9f2c.protoinst
new file mode 100644
index 0000000..cf73fce
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/protoinst_files/bd_9f2c.protoinst
@@ -0,0 +1,9 @@
+{
+ "version": "1.0",
+ "modules": {
+ "bd_9f2c": {
+ "proto_instances": {
+ }
+ }
+ }
+}
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vhdl.prj b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vhdl.prj
new file mode 100644
index 0000000..6148fd8
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vhdl.prj
@@ -0,0 +1,12 @@
+vhdl xil_defaultlib \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_0/sim/bd_9f2c_microblaze_I_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_1/sim/bd_9f2c_rst_0_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_2/sim/bd_9f2c_ilmb_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_3/sim/bd_9f2c_dlmb_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_4/sim/bd_9f2c_dlmb_cntlr_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_5/sim/bd_9f2c_ilmb_cntlr_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_7/sim/bd_9f2c_second_dlmb_cntlr_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_8/sim/bd_9f2c_second_ilmb_cntlr_0.vhd" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_10/sim/bd_9f2c_iomodule_0_0.vhd" \
+
+nosort
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vlog.prj b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vlog.prj
new file mode 100644
index 0000000..8ab6c6c
--- /dev/null
+++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/phy_ddr4/xsim/vlog.prj
@@ -0,0 +1,47 @@
+verilog xil_defaultlib --include "../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map" --include "../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top" --include "../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_6/sim/bd_9f2c_lmb_bram_I_0.v" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/ip/ip_9/sim/bd_9f2c_second_lmb_bram_I_0.v" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/bd_0/sim/bd_9f2c.v" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_0/sim/phy_ddr4_microblaze_mcs.v" \
+
+sv xil_defaultlib --include "../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/map" --include "../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top" --include "../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/phy/phy_ddr4_phy_ddr4.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/phy/ddr4_phy_v2_2_xiphy_behav.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/phy/ddr4_phy_v2_2_xiphy.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/iob/ddr4_phy_v2_2_iob_byte.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/iob/ddr4_phy_v2_2_iob.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/clocking/ddr4_phy_v2_2_pll.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_tristate_wrapper.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_riuor_wrapper.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_control_wrapper.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_byte_wrapper.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_bitslice_wrapper.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/ip_1/rtl/ip_top/phy_ddr4_phy.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/clocking/ddr4_v2_2_infrastructure.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_xsdb_bram.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_write.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_wr_byte.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_wr_bit.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_sync.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_read.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_rd_en.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_pi.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_mc_odt.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_debug_microblaze.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_cplx_data.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_cplx.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_config_rom.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_addr_decode.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_top.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal_xsdb_arbiter.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_cal.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_chipscope_xsdb_slave.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/ddr4_v2_2_dp_AB9.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top/phy_ddr4_ddr4.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/cal/phy_ddr4_ddr4_cal_riu.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/rtl/ip_top/phy_ddr4.sv" \
+"../../../../XUPVVH.srcs/sources_1/ip/phy_ddr4/tb/microblaze_mcs_0.sv" \
+
+verilog xil_defaultlib "glbl.v"
+
+nosort