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| author | Ataberk <olgunataberk@gmail.com> | 2022-09-25 17:22:03 +0200 |
|---|---|---|
| committer | Ataberk <olgunataberk@gmail.com> | 2022-09-25 17:22:03 +0200 |
| commit | dc0b3db1b4f1895a07e5fe280ee3790e87f97b9f (patch) | |
| tree | b47203aa281bdd959def4451c84d310cd9cf2e12 /projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do | |
| download | dram-bender-dc0b3db1b4f1895a07e5fe280ee3790e87f97b9f.tar.gz | |
Initial commit
Diffstat (limited to 'projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do')
| -rw-r--r-- | projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do new file mode 100644 index 0000000..41565dd --- /dev/null +++ b/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do @@ -0,0 +1,28 @@ +vlib work +vlib activehdl + +vlib activehdl/xpm +vlib activehdl/blk_mem_gen_v8_4_4 +vlib activehdl/xil_defaultlib + +vmap xpm activehdl/xpm +vmap blk_mem_gen_v8_4_4 activehdl/blk_mem_gen_v8_4_4 +vmap xil_defaultlib activehdl/xil_defaultlib + +vlog -work xpm -sv2k12 \ +"/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ +"/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ +"/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ + +vcom -work xpm -93 \ +"/tools/Xilinx/Vivado/2019.2/data/ip/xpm/xpm_VCOMP.vhd" \ + +vlog -work blk_mem_gen_v8_4_4 -v2k5 \ +"../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ + +vlog -work xil_defaultlib -v2k5 \ +"../../../../XUPVVH.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ + +vlog -work xil_defaultlib \ +"glbl.v" + |