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diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/README.txt new file mode 100644 index 0000000..5acdd2f --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/README.txt @@ -0,0 +1,83 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required +# to simulate the design for a simulator, the directory structure +# and the generated exported files. +# +################################################################################ + +1. Simulate Design + +To simulate design, cd to the simulator directory and execute the script. + +For example:- + +% cd questa +% ./top.sh + +The export simulation flow requires the Xilinx pre-compiled simulation library +components for the target simulator. These components are referred using the +'-lib_map_path' switch. If this switch is specified, then the export simulation +will automatically set this library path in the generated script and update, +copy the simulator setup file(s) in the exported directory. + +If '-lib_map_path' is not specified, then the pre-compiled simulation library +information will not be included in the exported scripts and that may cause +simulation errors when running this script. Alternatively, you can provide the +library information using this switch while executing the generated script. + +For example:- + +% ./top.sh -lib_map_path /design/questa/clibs + +Please refer to the generated script header 'Prerequisite' section for more details. + +2. Directory Structure + +By default, if the -directory switch is not specified, export_simulation will +create the following directory structure:- + +<current_working_directory>/export_sim/<simulator> + +For example, if the current working directory is /tmp/test, export_simulation +will create the following directory path:- + +/tmp/test/export_sim/questa + +If -directory switch is specified, export_simulation will create a simulator +sub-directory under the specified directory path. + +For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim' +command will create the following directory:- + +/tmp/test/my_test_area/func_sim/questa + +By default, if -simulator is not specified, export_simulation will create a +simulator sub-directory for each simulator and export the files for each simulator +in this sub-directory respectively. + +IMPORTANT: Please note that the simulation library path must be specified manually +in the generated script for the respective simulator. Please refer to the generated +script header 'Prerequisite' section for more details. + +3. Exported script and files + +Export simulation will create the driver shell script, setup files and copy the +design sources in the output directory path. + +By default, when the -script_name switch is not specified, export_simulation will +create the following script name:- + +<simulation_top>.sh (Unix) +When exporting the files for an IP using the -of_objects switch, export_simulation +will create the following script name:- + +<ip-name>.sh (Unix) +Export simulation will create the setup files for the target simulator specified +with the -simulator switch. + +For example, if the target simulator is "ies", export_simulation will create the +'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib' +file. + diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/README.txt new file mode 100644 index 0000000..2eae1bd --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/README.txt @@ -0,0 +1,49 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'compile', 'elaborate' and 'simulate' functions +implemented in the script file for the 3-step flow. These functions are called +from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do new file mode 100644 index 0000000..ef7be87 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/compile.do @@ -0,0 +1,41 @@ +vlib work +vlib activehdl + +vlib activehdl/xilinx_vip +vlib activehdl/xpm +vlib activehdl/blk_mem_gen_v8_4_4 +vlib activehdl/xil_defaultlib + +vmap xilinx_vip activehdl/xilinx_vip +vmap xpm activehdl/xpm +vmap blk_mem_gen_v8_4_4 activehdl/blk_mem_gen_v8_4_4 +vmap xil_defaultlib activehdl/xil_defaultlib + +vlog -work xilinx_vip -sv2k12 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv" \ + +vlog -work xpm -sv2k12 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ + +vcom -work xpm -93 \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \ + +vlog -work blk_mem_gen_v8_4_4 -v2k5 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ + +vlog -work xil_defaultlib -v2k5 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ + +vlog -work xil_defaultlib \ +"glbl.v" + diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/file_info.txt new file mode 100644 index 0000000..df82e18 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/file_info.txt @@ -0,0 +1,16 @@ +axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv, +axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv, +xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv, +axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv, +axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv, +axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv, +axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv, +clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv, +rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv, +xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv, +xpm_fifo.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv, +xpm_memory.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv, +xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd, +blk_mem_gen_v8_4.v,verilog,blk_mem_gen_v8_4_4,../../../ipstatic/simulation/blk_mem_gen_v8_4.v, +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/scratchpad.sh new file mode 100755 index 0000000..62643c3 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/scratchpad.sh @@ -0,0 +1,152 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Aldec Active-HDL Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the +# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the +# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch +# that points to these libraries and rerun export_simulation. For more information about this switch please +# type 'export_simulation -help' in the Tcl shell. +# +# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this +# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when +# executing this script. Please type 'scratchpad.sh -help' for more information. +# +# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' +# +#********************************************************************************************************* + + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + compile + simulate +} + +# RUN_STEP: <compile> +compile() +{ + # Compile design files + source compile.do 2>&1 | tee -a compile.log + +} + +# RUN_STEP: <simulate> +simulate() +{ + runvsimsa -l simulate.log -do "do {simulate.do}" +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + map_setup_file $2 + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + map_setup_file $2 + esac + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Map library.cfg file +map_setup_file() +{ + file="library.cfg" + lib_map_path="" + if [[ ($1 != "") ]]; then + lib_map_path="$1" + fi + if [[ ($lib_map_path != "") ]]; then + src_file="$lib_map_path/$file" + if [[ -e $src_file ]]; then + vmap -link $lib_map_path + fi + fi +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(compile.log elaboration.log simulate.log dataset.asdb work activehdl) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/scratchpad.udo b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/scratchpad.udo new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/scratchpad.udo diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/simulate.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/simulate.do new file mode 100644 index 0000000..6c79e4a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/simulate.do @@ -0,0 +1,17 @@ +onbreak {quit -force} +onerror {quit -force} + +asim +access +r +m+scratchpad -L xilinx_vip -L xpm -L blk_mem_gen_v8_4_4 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -O5 xil_defaultlib.scratchpad xil_defaultlib.glbl + +do {wave.do} + +view wave +view structure + +do {scratchpad.udo} + +run -all + +endsim + +quit -force diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/wave.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/wave.do new file mode 100644 index 0000000..70157b0 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/activehdl/wave.do @@ -0,0 +1,2 @@ +add wave * +add wave /glbl/GSR diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/README.txt new file mode 100644 index 0000000..7abac0d --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/README.txt @@ -0,0 +1,48 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'execute' function for the single-step flow. This +function is called from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/file_info.txt new file mode 100644 index 0000000..df82e18 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/file_info.txt @@ -0,0 +1,16 @@ +axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv, +axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv, +xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv, +axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv, +axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv, +axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv, +axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv, +clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv, +rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv, +xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv, +xpm_fifo.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv, +xpm_memory.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv, +xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd, +blk_mem_gen_v8_4.v,verilog,blk_mem_gen_v8_4_4,../../../ipstatic/simulation/blk_mem_gen_v8_4.v, +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/run.f b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/run.f new file mode 100644 index 0000000..af75aa4 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/run.f @@ -0,0 +1,29 @@ +-makelib ies_lib/xilinx_vip -sv \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv" \ +-endlib +-makelib ies_lib/xpm -sv \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ +-endlib +-makelib ies_lib/xpm \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \ +-endlib +-makelib ies_lib/blk_mem_gen_v8_4_4 \ + "../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ +-endlib +-makelib ies_lib/xil_defaultlib \ + "../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ +-endlib +-makelib ies_lib/xil_defaultlib \ + glbl.v +-endlib + diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/scratchpad.sh new file mode 100755 index 0000000..8784621 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/scratchpad.sh @@ -0,0 +1,176 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Cadence Incisive Enterprise Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the +# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the +# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch +# that points to these libraries and rerun export_simulation. For more information about this switch please +# type 'export_simulation -help' in the Tcl shell. +# +# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this +# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when +# executing this script. Please type 'scratchpad.sh -help' for more information. +# +# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' +# +#********************************************************************************************************* + +# Directory path for design sources and include directories (if any) wrt this path +ref_dir="." + +# Override directory with 'export_sim_ref_dir' env path value if set in the shell +if [[ (! -z "$export_sim_ref_dir") && ($export_sim_ref_dir != "") ]]; then + ref_dir="$export_sim_ref_dir" +fi + +# Set the compiled library directory +ref_lib_dir="." + +# Command line options +irun_opts="-64bit -v93 -relax -access +rwc -namemap_mixgen" + +# Design libraries +design_libs=(xilinx_vip xpm blk_mem_gen_v8_4_4 xil_defaultlib) + +# Simulation root library directory +sim_lib_dir="ies_lib" + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + execute +} + +# RUN_STEP: <execute> +execute() +{ + irun $irun_opts \ + -reflib "$ref_lib_dir/unisim:unisim" \ + -reflib "$ref_lib_dir/unisims_ver:unisims_ver" \ + -reflib "$ref_lib_dir/secureip:secureip" \ + -reflib "$ref_lib_dir/unimacro:unimacro" \ + -reflib "$ref_lib_dir/unimacro_ver:unimacro_ver" \ + -top xil_defaultlib.scratchpad \ + -f run.f \ + -top glbl \ + glbl.v \ + +incdir+"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + else + ref_lib_dir=$2 + fi + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + esac + + create_lib_dir + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Create design library directory paths +create_lib_dir() +{ + if [[ -e $sim_lib_dir ]]; then + rm -rf $sim_lib_dir + fi + + for (( i=0; i<${#design_libs[*]}; i++ )); do + lib="${design_libs[i]}" + lib_dir="$sim_lib_dir/$lib" + if [[ ! -e $lib_dir ]]; then + mkdir -p $lib_dir + fi + done +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(ncsim.key irun.key irun.log waves.shm irun.history .simvision INCA_libs) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done + + create_lib_dir +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/ies/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/README.txt new file mode 100644 index 0000000..2eae1bd --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/README.txt @@ -0,0 +1,49 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'compile', 'elaborate' and 'simulate' functions +implemented in the script file for the 3-step flow. These functions are called +from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/compile.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/compile.do new file mode 100644 index 0000000..e8c4be4 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/compile.do @@ -0,0 +1,41 @@ +vlib modelsim_lib/work +vlib modelsim_lib/msim + +vlib modelsim_lib/msim/xilinx_vip +vlib modelsim_lib/msim/xpm +vlib modelsim_lib/msim/blk_mem_gen_v8_4_4 +vlib modelsim_lib/msim/xil_defaultlib + +vmap xilinx_vip modelsim_lib/msim/xilinx_vip +vmap xpm modelsim_lib/msim/xpm +vmap blk_mem_gen_v8_4_4 modelsim_lib/msim/blk_mem_gen_v8_4_4 +vmap xil_defaultlib modelsim_lib/msim/xil_defaultlib + +vlog -work xilinx_vip -64 -incr -sv -L xdma_v4_1_8 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv" \ + +vlog -work xpm -64 -incr -sv -L xdma_v4_1_8 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ + +vcom -work xpm -64 -93 \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \ + +vlog -work blk_mem_gen_v8_4_4 -64 -incr "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ + +vlog -work xil_defaultlib -64 -incr "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ + +vlog -work xil_defaultlib \ +"glbl.v" + diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/file_info.txt new file mode 100644 index 0000000..df82e18 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/file_info.txt @@ -0,0 +1,16 @@ +axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv, +axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv, +xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv, +axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv, +axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv, +axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv, +axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv, +clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv, +rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv, +xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv, +xpm_fifo.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv, +xpm_memory.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv, +xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd, +blk_mem_gen_v8_4.v,verilog,blk_mem_gen_v8_4_4,../../../ipstatic/simulation/blk_mem_gen_v8_4.v, +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/scratchpad.sh new file mode 100755 index 0000000..e0a9ed5 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/scratchpad.sh @@ -0,0 +1,167 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Mentor Graphics ModelSim Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the +# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the +# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch +# that points to these libraries and rerun export_simulation. For more information about this switch please +# type 'export_simulation -help' in the Tcl shell. +# +# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this +# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when +# executing this script. Please type 'scratchpad.sh -help' for more information. +# +# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' +# +#********************************************************************************************************* + + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + compile + simulate +} + +# RUN_STEP: <compile> +compile() +{ + # Compile design files + source compile.do 2>&1 | tee -a compile.log + +} + +# RUN_STEP: <simulate> +simulate() +{ + vsim -64 -c -do "do {simulate.do}" -l simulate.log +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + copy_setup_file $2 + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + copy_setup_file $2 + esac + + create_lib_dir + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Copy modelsim.ini file +copy_setup_file() +{ + file="modelsim.ini" + if [[ ($1 != "") ]]; then + lib_map_path="$1" + else + lib_map_path="/home/ataberk/SoftMC_DDR4/projects/U200/U200.cache/compile_simlib/modelsim" + fi + if [[ ($lib_map_path != "") ]]; then + src_file="$lib_map_path/$file" + cp $src_file . + fi +} + +# Create design library directory +create_lib_dir() +{ + lib_dir="modelsim_lib" + if [[ -e $lib_dir ]]; then + rm -rf $lib_dir + fi + + mkdir $lib_dir + +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(compile.log elaborate.log simulate.log vsim.wlf modelsim_lib) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done + + create_lib_dir +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/scratchpad.udo b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/scratchpad.udo new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/scratchpad.udo diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/simulate.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/simulate.do new file mode 100644 index 0000000..6e1a057 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/simulate.do @@ -0,0 +1,16 @@ +onbreak {quit -f} +onerror {quit -f} + +vsim -voptargs="+acc" -L xilinx_vip -L xpm -L blk_mem_gen_v8_4_4 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -lib xil_defaultlib xil_defaultlib.scratchpad xil_defaultlib.glbl + +do {wave.do} + +view wave +view structure +view signals + +do {scratchpad.udo} + +run -all + +quit -force diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/wave.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/wave.do new file mode 100644 index 0000000..70157b0 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/modelsim/wave.do @@ -0,0 +1,2 @@ +add wave * +add wave /glbl/GSR diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/README.txt new file mode 100644 index 0000000..2eae1bd --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/README.txt @@ -0,0 +1,49 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'compile', 'elaborate' and 'simulate' functions +implemented in the script file for the 3-step flow. These functions are called +from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/compile.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/compile.do new file mode 100644 index 0000000..78fc227 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/compile.do @@ -0,0 +1,41 @@ +vlib questa_lib/work +vlib questa_lib/msim + +vlib questa_lib/msim/xilinx_vip +vlib questa_lib/msim/xpm +vlib questa_lib/msim/blk_mem_gen_v8_4_4 +vlib questa_lib/msim/xil_defaultlib + +vmap xilinx_vip questa_lib/msim/xilinx_vip +vmap xpm questa_lib/msim/xpm +vmap blk_mem_gen_v8_4_4 questa_lib/msim/blk_mem_gen_v8_4_4 +vmap xil_defaultlib questa_lib/msim/xil_defaultlib + +vlog -work xilinx_vip -64 -sv -L xdma_v4_1_8 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv" \ + +vlog -work xpm -64 -sv -L xdma_v4_1_8 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ + +vcom -work xpm -64 -93 \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \ + +vlog -work blk_mem_gen_v8_4_4 -64 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ + +vlog -work xil_defaultlib -64 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ + +vlog -work xil_defaultlib \ +"glbl.v" + diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/elaborate.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/elaborate.do new file mode 100644 index 0000000..f4279c7 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/elaborate.do @@ -0,0 +1 @@ +vopt -64 +acc=npr -l elaborate.log -L xilinx_vip -L xpm -L blk_mem_gen_v8_4_4 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -work xil_defaultlib xil_defaultlib.scratchpad xil_defaultlib.glbl -o scratchpad_opt diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/file_info.txt new file mode 100644 index 0000000..df82e18 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/file_info.txt @@ -0,0 +1,16 @@ +axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv, +axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv, +xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv, +axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv, +axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv, +axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv, +axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv, +clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv, +rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv, +xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv, +xpm_fifo.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv, +xpm_memory.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv, +xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd, +blk_mem_gen_v8_4.v,verilog,blk_mem_gen_v8_4_4,../../../ipstatic/simulation/blk_mem_gen_v8_4.v, +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/scratchpad.sh new file mode 100755 index 0000000..26758fa --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/scratchpad.sh @@ -0,0 +1,174 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Mentor Graphics Questa Advanced Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the +# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the +# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch +# that points to these libraries and rerun export_simulation. For more information about this switch please +# type 'export_simulation -help' in the Tcl shell. +# +# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this +# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when +# executing this script. Please type 'scratchpad.sh -help' for more information. +# +# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' +# +#********************************************************************************************************* + + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + compile + elaborate + simulate +} + +# RUN_STEP: <compile> +compile() +{ + # Compile design files + source compile.do 2>&1 | tee -a compile.log + +} + +# RUN_STEP: <elaborate> +elaborate() +{ + source elaborate.do 2>&1 | tee -a elaborate.log +} + +# RUN_STEP: <simulate> +simulate() +{ + vsim -64 -c -do "do {simulate.do}" -l simulate.log +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + copy_setup_file $2 + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + copy_setup_file $2 + esac + + create_lib_dir + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Copy modelsim.ini file +copy_setup_file() +{ + file="modelsim.ini" + if [[ ($1 != "") ]]; then + lib_map_path="$1" + else + lib_map_path="/home/ataberk/SoftMC_DDR4/projects/U200/U200.cache/compile_simlib/questa" + fi + if [[ ($lib_map_path != "") ]]; then + src_file="$lib_map_path/$file" + cp $src_file . + fi +} + +# Create design library directory +create_lib_dir() +{ + lib_dir="questa_lib" + if [[ -e $lib_dir ]]; then + rm -rf $lib_dir + fi + + mkdir $lib_dir + +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(compile.log elaborate.log simulate.log vsim.wlf questa_lib) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done + + create_lib_dir +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/scratchpad.udo b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/scratchpad.udo new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/scratchpad.udo diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/simulate.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/simulate.do new file mode 100644 index 0000000..aa4b5cd --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/simulate.do @@ -0,0 +1,16 @@ +onbreak {quit -f} +onerror {quit -f} + +vsim -lib xil_defaultlib scratchpad_opt + +do {wave.do} + +view wave +view structure +view signals + +do {scratchpad.udo} + +run -all + +quit -force diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/wave.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/wave.do new file mode 100644 index 0000000..70157b0 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/questa/wave.do @@ -0,0 +1,2 @@ +add wave * +add wave /glbl/GSR diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/README.txt new file mode 100644 index 0000000..2eae1bd --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/README.txt @@ -0,0 +1,49 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'compile', 'elaborate' and 'simulate' functions +implemented in the script file for the 3-step flow. These functions are called +from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/compile.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/compile.do new file mode 100644 index 0000000..ffa5c78 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/compile.do @@ -0,0 +1,41 @@ +vlib work +vlib riviera + +vlib riviera/xilinx_vip +vlib riviera/xpm +vlib riviera/blk_mem_gen_v8_4_4 +vlib riviera/xil_defaultlib + +vmap xilinx_vip riviera/xilinx_vip +vmap xpm riviera/xpm +vmap blk_mem_gen_v8_4_4 riviera/blk_mem_gen_v8_4_4 +vmap xil_defaultlib riviera/xil_defaultlib + +vlog -work xilinx_vip -sv2k12 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv" \ + +vlog -work xpm -sv2k12 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ + +vcom -work xpm -93 \ +"/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \ + +vlog -work blk_mem_gen_v8_4_4 -v2k5 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ + +vlog -work xil_defaultlib -v2k5 "+incdir+/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ +"../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ + +vlog -work xil_defaultlib \ +"glbl.v" + diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/file_info.txt new file mode 100644 index 0000000..df82e18 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/file_info.txt @@ -0,0 +1,16 @@ +axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv, +axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv, +xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv, +axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv, +axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv, +axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv, +axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv, +clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv, +rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv, +xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv, +xpm_fifo.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv, +xpm_memory.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv, +xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd, +blk_mem_gen_v8_4.v,verilog,blk_mem_gen_v8_4_4,../../../ipstatic/simulation/blk_mem_gen_v8_4.v, +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/scratchpad.sh new file mode 100755 index 0000000..2baf52b --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/scratchpad.sh @@ -0,0 +1,153 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Aldec Riviera-PRO Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the +# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the +# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch +# that points to these libraries and rerun export_simulation. For more information about this switch please +# type 'export_simulation -help' in the Tcl shell. +# +# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this +# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when +# executing this script. Please type 'scratchpad.sh -help' for more information. +# +# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' +# +#********************************************************************************************************* + + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + compile + simulate +} + +# RUN_STEP: <compile> +compile() +{ + # Compile design files + source compile.do 2>&1 | tee -a compile.log + +} + +# RUN_STEP: <simulate> +simulate() +{ + runvsimsa -l simulate.log -do "do {simulate.do}" +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + map_setup_file $2 + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + map_setup_file $2 + esac + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Map library.cfg file +map_setup_file() +{ + file="library.cfg" + if [[ ($1 != "") ]]; then + lib_map_path="$1" + else + lib_map_path="/home/ataberk/SoftMC_DDR4/projects/U200/U200.cache/compile_simlib/riviera" + fi + if [[ ($lib_map_path != "") ]]; then + src_file="$lib_map_path/$file" + if [[ -e $src_file ]]; then + vmap -link $lib_map_path + fi + fi +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(compile.log elaboration.log simulate.log dataset.asdb work riviera) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/scratchpad.udo b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/scratchpad.udo new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/scratchpad.udo diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/simulate.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/simulate.do new file mode 100644 index 0000000..6c79e4a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/simulate.do @@ -0,0 +1,17 @@ +onbreak {quit -force} +onerror {quit -force} + +asim +access +r +m+scratchpad -L xilinx_vip -L xpm -L blk_mem_gen_v8_4_4 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -O5 xil_defaultlib.scratchpad xil_defaultlib.glbl + +do {wave.do} + +view wave +view structure + +do {scratchpad.udo} + +run -all + +endsim + +quit -force diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/wave.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/wave.do new file mode 100644 index 0000000..70157b0 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/riviera/wave.do @@ -0,0 +1,2 @@ +add wave * +add wave /glbl/GSR diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/README.txt new file mode 100644 index 0000000..2eae1bd --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/README.txt @@ -0,0 +1,49 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'compile', 'elaborate' and 'simulate' functions +implemented in the script file for the 3-step flow. These functions are called +from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/file_info.txt new file mode 100644 index 0000000..df82e18 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/file_info.txt @@ -0,0 +1,16 @@ +axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv, +axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv, +xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv, +axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv, +axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv, +axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv, +axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv, +clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv, +rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv, +xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv, +xpm_fifo.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv, +xpm_memory.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv, +xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd, +blk_mem_gen_v8_4.v,verilog,blk_mem_gen_v8_4_4,../../../ipstatic/simulation/blk_mem_gen_v8_4.v, +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/scratchpad.sh new file mode 100755 index 0000000..886794d --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/scratchpad.sh @@ -0,0 +1,247 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Synopsys Verilog Compiler Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the +# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the +# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch +# that points to these libraries and rerun export_simulation. For more information about this switch please +# type 'export_simulation -help' in the Tcl shell. +# +# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this +# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when +# executing this script. Please type 'scratchpad.sh -help' for more information. +# +# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' +# +#********************************************************************************************************* + +# Directory path for design sources and include directories (if any) wrt this path +ref_dir="." + +# Override directory with 'export_sim_ref_dir' env path value if set in the shell +if [[ (! -z "$export_sim_ref_dir") && ($export_sim_ref_dir != "") ]]; then + ref_dir="$export_sim_ref_dir" +fi + +# Command line options +vlogan_opts="-full64" +vhdlan_opts="-full64" +vcs_elab_opts="-full64 -debug_pp -t ps -licqueue -l elaborate.log" +vcs_sim_opts="-ucli -licqueue -l simulate.log" + +# Design libraries +design_libs=(xilinx_vip xpm blk_mem_gen_v8_4_4 xil_defaultlib) + +# Simulation root library directory +sim_lib_dir="vcs_lib" + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + compile + elaborate + simulate +} + +# RUN_STEP: <compile> +compile() +{ + # Compile design files + vlogan -work xilinx_vip $vlogan_opts -sverilog +incdir+"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv" \ + 2>&1 | tee -a vlogan.log + + vlogan -work xpm $vlogan_opts -sverilog +incdir+"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ + 2>&1 | tee -a vlogan.log + + vhdlan -work xpm $vhdlan_opts \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \ + 2>&1 | tee -a vhdlan.log + + vlogan -work blk_mem_gen_v8_4_4 $vlogan_opts +v2k +incdir+"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ + "$ref_dir/../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ + 2>&1 | tee -a vlogan.log + + vlogan -work xil_defaultlib $vlogan_opts +v2k +incdir+"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" \ + "$ref_dir/../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ + 2>&1 | tee -a vlogan.log + + + vlogan -work xil_defaultlib $vlogan_opts +v2k \ + glbl.v \ + 2>&1 | tee -a vlogan.log + +} + +# RUN_STEP: <elaborate> +elaborate() +{ + vcs $vcs_elab_opts xil_defaultlib.scratchpad xil_defaultlib.glbl -o scratchpad_simv +} + +# RUN_STEP: <simulate> +simulate() +{ + ./scratchpad_simv $vcs_sim_opts -do simulate.do +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + create_lib_mappings $2 + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + create_lib_mappings $2 + esac + + create_lib_dir + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Define design library mappings +create_lib_mappings() +{ + file="synopsys_sim.setup" + if [[ -e $file ]]; then + if [[ ($1 == "") ]]; then + return + else + rm -rf $file + fi + fi + + touch $file + + if [[ ($1 != "") ]]; then + lib_map_path="$1" + else + lib_map_path="/home/ataberk/SoftMC_DDR4/projects/U200/U200.cache/compile_simlib/vcs" + fi + + for (( i=0; i<${#design_libs[*]}; i++ )); do + lib="${design_libs[i]}" + mapping="$lib:$sim_lib_dir/$lib" + echo $mapping >> $file + done + + if [[ ($lib_map_path != "") ]]; then + incl_ref="OTHERS=$lib_map_path/synopsys_sim.setup" + echo $incl_ref >> $file + fi +} + +# Create design library directory paths +create_lib_dir() +{ + if [[ -e $sim_lib_dir ]]; then + rm -rf $sim_lib_dir + fi + + for (( i=0; i<${#design_libs[*]}; i++ )); do + lib="${design_libs[i]}" + lib_dir="$sim_lib_dir/$lib" + if [[ ! -e $lib_dir ]]; then + mkdir -p $lib_dir + fi + done +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(ucli.key scratchpad_simv vlogan.log vhdlan.log compile.log elaborate.log simulate.log .vlogansetup.env .vlogansetup.args .vcs_lib_lock scirocco_command.log 64 AN.DB csrc scratchpad_simv.daidir) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done + + create_lib_dir +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/simulate.do b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/simulate.do new file mode 100644 index 0000000..58afc78 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/simulate.do @@ -0,0 +1,2 @@ +run +quit diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/vcs/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/README.txt new file mode 100644 index 0000000..7abac0d --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/README.txt @@ -0,0 +1,48 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'execute' function for the single-step flow. This +function is called from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/file_info.txt new file mode 100644 index 0000000..df82e18 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/file_info.txt @@ -0,0 +1,16 @@ +axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv, +axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv, +xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv, +axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv, +axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv, +axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv, +axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv, +clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv, +rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv, +xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv, +xpm_fifo.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv, +xpm_memory.sv,systemverilog,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv, +xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd, +blk_mem_gen_v8_4.v,verilog,blk_mem_gen_v8_4_4,../../../ipstatic/simulation/blk_mem_gen_v8_4.v, +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/run.f b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/run.f new file mode 100644 index 0000000..fe626da --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/run.f @@ -0,0 +1,29 @@ +-makelib xcelium_lib/xilinx_vip -sv \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/axi_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/clk_vip_if.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/hdl/rst_vip_if.sv" \ +-endlib +-makelib xcelium_lib/xpm -sv \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv" \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \ +-endlib +-makelib xcelium_lib/xpm \ + "/tools/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd" \ +-endlib +-makelib xcelium_lib/blk_mem_gen_v8_4_4 \ + "../../../ipstatic/simulation/blk_mem_gen_v8_4.v" \ +-endlib +-makelib xcelium_lib/xil_defaultlib \ + "../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ +-endlib +-makelib xcelium_lib/xil_defaultlib \ + glbl.v +-endlib + diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/scratchpad.sh new file mode 100755 index 0000000..5f71422 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/scratchpad.sh @@ -0,0 +1,176 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Cadence Xcelium Parallel Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the +# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the +# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch +# that points to these libraries and rerun export_simulation. For more information about this switch please +# type 'export_simulation -help' in the Tcl shell. +# +# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this +# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when +# executing this script. Please type 'scratchpad.sh -help' for more information. +# +# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' +# +#********************************************************************************************************* + +# Directory path for design sources and include directories (if any) wrt this path +ref_dir="." + +# Override directory with 'export_sim_ref_dir' env path value if set in the shell +if [[ (! -z "$export_sim_ref_dir") && ($export_sim_ref_dir != "") ]]; then + ref_dir="$export_sim_ref_dir" +fi + +# Set the compiled library directory +ref_lib_dir="." + +# Command line options +xrun_opts="-64bit -v93 -relax -access +rwc -namemap_mixgen" + +# Design libraries +design_libs=(xilinx_vip xpm blk_mem_gen_v8_4_4 xil_defaultlib) + +# Simulation root library directory +sim_lib_dir="xcelium_lib" + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + execute +} + +# RUN_STEP: <execute> +execute() +{ + xrun $xrun_opts \ + -reflib "$ref_lib_dir/unisim:unisim" \ + -reflib "$ref_lib_dir/unisims_ver:unisims_ver" \ + -reflib "$ref_lib_dir/secureip:secureip" \ + -reflib "$ref_lib_dir/unimacro:unimacro" \ + -reflib "$ref_lib_dir/unimacro_ver:unimacro_ver" \ + -top xil_defaultlib.scratchpad \ + -f run.f \ + -top glbl \ + glbl.v \ + +incdir+"/tools/Xilinx/Vivado/2020.2/data/xilinx_vip/include" +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + else + ref_lib_dir=$2 + fi + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + esac + + create_lib_dir + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Create design library directory paths +create_lib_dir() +{ + if [[ -e $sim_lib_dir ]]; then + rm -rf $sim_lib_dir + fi + + for (( i=0; i<${#design_libs[*]}; i++ )); do + lib="${design_libs[i]}" + lib_dir="$sim_lib_dir/$lib" + if [[ ! -e $lib_dir ]]; then + mkdir -p $lib_dir + fi + done +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(xmsim.key xrun.key xrun.log waves.shm xrun.history .simvision xcelium.d xcelium) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done + + create_lib_dir +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xcelium/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/README.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/README.txt new file mode 100644 index 0000000..2eae1bd --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/README.txt @@ -0,0 +1,49 @@ +################################################################################ +# Vivado (TM) v2020.2 (64-bit) +# +# README.txt: Please read the sections below to understand the steps required to +# run the exported script and information about the source files. +# +# Generated by export_simulation on Tue Mar 08 14:24:53 CET 2022 +# +################################################################################ + +1. How to run the generated simulation script:- + +From the shell prompt in the current directory, issue the following command:- + +./scratchpad.sh + +This command will launch the 'compile', 'elaborate' and 'simulate' functions +implemented in the script file for the 3-step flow. These functions are called +from the main 'run' function in the script file. + +The 'run' function first executes the 'setup' function, the purpose of which is to +create simulator specific setup files, create design library mappings and library +directories and copy 'glbl.v' from the Vivado software install location into the +current directory. + +The 'setup' function is also used for removing the simulator generated data in +order to reset the current directory to the original state when export_simulation +was launched from Vivado. This generated data can be removed by specifying the +'-reset_run' switch to the './scratchpad.sh' script. + +./scratchpad.sh -reset_run + +To keep the generated data from the previous run but regenerate the setup files and +library directories, use the '-noclean_files' switch. + +./scratchpad.sh -noclean_files + +For more information on the script, please type './scratchpad.sh -help'. + +2. Additional design information files:- + +export_simulation generates following additional file that can be used for fetching +the design files information or for integrating with external custom scripts. + +Name : file_info.txt +Purpose: This file contains detail design file information based on the compile order + when export_simulation was executed from Vivado. The file contains information + about the file type, name, whether it is part of the IP, associated library + and the file path information. diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/U200.smi b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/U200.smi new file mode 100644 index 0000000..f20b0a8 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/U200.smi @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!-- Product Version: Vivado v2020.2 (64-bit) --> +<!-- SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 --> +<!-- --> +<!-- Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. --> +<!-- Nov 18 2020 --> +<!-- --> +<!-- This file is generated by the software with the Tcl write_mem_info command. --> +<!-- Do not edit this file. --> + +<MemInfoSimulation Version="1" Minor="1"> + <Processor Endianness="Little" InstPath="phy_ddr4_i/inst/u_ddr_cal_riu/mcs0/inst/microblaze_I"> + <AddressSpace Name="phy_ddr4_i_inst_u_ddr_cal_riu_mcs0_inst_microblaze_I.phy_ddr4_i_inst_u_ddr_cal_riu_mcs0_inst_lmb_bram_I_64K_1_ADDR_SPACE" ECC="NONE" Begin="0" End="98303"> + <BusBlock> + <BitLane MemType="lmb_bram_I_64K_1_MEM_DEVICE" MemType_DataWidth="32" MemType_AddressDepth="98303"> + <DataWidth MSB="31" LSB="0"/> + <AddressRange Begin="0" End="16383"/> + <Parity ON="false" NumBits="0"/> + <MemFile Name="bd_ba6a_lmb_bram_I_0.mem"/> + </BitLane> + </BusBlock> + </AddressSpace> + </Processor> + <Config> + <Option Name="Part" Val="xcu200-fsgd2104-2-e"/> + </Config> + <DRC> + <Rule Name="RDADDRCHANGE" Val="false"/> + </DRC> +</MemInfoSimulation> diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/cmd.tcl b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/cmd.tcl new file mode 100644 index 0000000..eef7a0f --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/cmd.tcl @@ -0,0 +1,12 @@ +set curr_wave [current_wave_config] +if { [string length $curr_wave] == 0 } { + if { [llength [get_objects]] > 0} { + add_wave / + set_property needs_save false [current_wave_config] + } else { + send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." + } +} + +run -all +quit diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/file_info.txt b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/file_info.txt new file mode 100644 index 0000000..a593cef --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/file_info.txt @@ -0,0 +1,2 @@ +scratchpad.v,verilog,xil_defaultlib,../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v, +glbl.v,Verilog,xil_defaultlib,glbl.v diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/glbl.v b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/glbl.v new file mode 100644 index 0000000..ed3b249 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/glbl.v @@ -0,0 +1,84 @@ +// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $ +`ifndef GLBL +`define GLBL +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + parameter GRES_WIDTH = 10000; + parameter GRES_START = 10000; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + wire GRESTORE; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + wire FCSBO_GLBL; + wire [3:0] DO_GLBL; + wire [3:0] DI_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + reg GRESTORE_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (strong1, weak0) GSR = GSR_int; + assign (strong1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + assign (strong1, weak0) GRESTORE = GRESTORE_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + + initial begin + GRESTORE_int = 1'b0; + #(GRES_START); + GRESTORE_int = 1'b1; + #(GRES_WIDTH); + GRESTORE_int = 1'b0; + end + +endmodule +`endif diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_9f2c.protoinst b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_9f2c.protoinst new file mode 100644 index 0000000..cf73fce --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_9f2c.protoinst @@ -0,0 +1,9 @@ +{ + "version": "1.0", + "modules": { + "bd_9f2c": { + "proto_instances": { + } + } + } +} diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_afa8.protoinst b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_afa8.protoinst new file mode 100644 index 0000000..a0656b6 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_afa8.protoinst @@ -0,0 +1,9 @@ +{ + "version": "1.0", + "modules": { + "bd_afa8": { + "proto_instances": { + } + } + } +} diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_ba6a.protoinst b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_ba6a.protoinst new file mode 100644 index 0000000..c42e1c4 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/protoinst_files/bd_ba6a.protoinst @@ -0,0 +1,9 @@ +{ + "version": "1.0", + "modules": { + "bd_ba6a": { + "proto_instances": { + } + } + } +} diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/scratchpad.sh b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/scratchpad.sh new file mode 100755 index 0000000..3ee51c2 --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/scratchpad.sh @@ -0,0 +1,212 @@ +#!/bin/bash -f +#********************************************************************************************************* +# Vivado (TM) v2020.2 (64-bit) +# +# Filename : scratchpad.sh +# Simulator : Xilinx Vivado Simulator +# Description : Simulation script for compiling, elaborating and verifying the project source files. +# The script will automatically create the design libraries sub-directories in the run +# directory, add the library logical mappings in the simulator setup file, create default +# 'do/prj' file, execute compilation, elaboration and simulation steps. +# +# Generated by Vivado on Tue Mar 08 14:24:53 CET 2022 +# SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 +# +# Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. +# +# usage: scratchpad.sh [-help] +# usage: scratchpad.sh [-lib_map_path] +# usage: scratchpad.sh [-noclean_files] +# usage: scratchpad.sh [-reset_run] +# +#********************************************************************************************************* + +# Command line options +xv_boost_lib_path=/tools/Xilinx/Vivado/2020.2/tps/boost_1_64_0 +xvlog_opts="--relax -L xdma_v4_1_8" + + +# Script info +echo -e "scratchpad.sh - Script generated by export_simulation (Vivado v2020.2 (64-bit)-id)\n" + +# Main steps +run() +{ + check_args $# $1 + setup $1 $2 + compile + elaborate + simulate +} + +# RUN_STEP: <compile> +compile() +{ + # Compile design files + xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log + +} + +# RUN_STEP: <elaborate> +elaborate() +{ + xelab --relax --debug typical --mt auto -L blk_mem_gen_v8_4_4 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot scratchpad xil_defaultlib.scratchpad xil_defaultlib.glbl -log elaborate.log +} + +# RUN_STEP: <simulate> +simulate() +{ + xsim scratchpad -key {Behavioral:sim_1:Functional:scratchpad} -tclbatch cmd.tcl -protoinst "protoinst_files/bd_9f2c.protoinst" -protoinst "protoinst_files/bd_ba6a.protoinst" -protoinst "protoinst_files/bd_afa8.protoinst" -log simulate.log +} + +# STEP: setup +setup() +{ + case $1 in + "-lib_map_path" ) + if [[ ($2 == "") ]]; then + echo -e "ERROR: Simulation library directory path not specified (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + copy_setup_file $2 + ;; + "-reset_run" ) + reset_run + echo -e "INFO: Simulation run files deleted.\n" + exit 0 + ;; + "-noclean_files" ) + # do not remove previous data + ;; + * ) + copy_setup_file $2 + esac + + # Add any setup/initialization commands here:- + + # <user specific commands> + +} + +# Copy xsim.ini file +copy_setup_file() +{ + file="xsim.ini" + lib_map_path="/tools/Xilinx/Vivado/2020.2/data/xsim" + if [[ ($1 != "") ]]; then + lib_map_path="$1" + fi + if [[ ($lib_map_path != "") ]]; then + src_file="$lib_map_path/$file" + if [[ -e $src_file ]]; then + cp $src_file . + fi + + # Map local design libraries to xsim.ini + map_local_libs + + fi +} + +# Map local design libraries +map_local_libs() +{ + updated_mappings=() + local_mappings=() + + # Local design libraries + local_libs=() + + if [[ 0 == ${#local_libs[@]} ]]; then + return + fi + + file="xsim.ini" + file_backup="xsim.ini.bak" + + if [[ -e $file ]]; then + rm -f $file_backup + # Create a backup copy of the xsim.ini file + cp $file $file_backup + # Read libraries from backup file and search in local library collection + while read -r line + do + IN=$line + # Split mapping entry with '=' delimiter to fetch library name and mapping + read lib_name mapping <<<$(IFS="="; echo $IN) + # If local library found, then construct the local mapping and add to local mapping collection + if `echo ${local_libs[@]} | grep -wq $lib_name` ; then + line="$lib_name=xsim.dir/$lib_name" + local_mappings+=("$lib_name") + fi + # Add to updated library mapping collection + updated_mappings+=("$line") + done < "$file_backup" + # Append local libraries not found originally from xsim.ini + for (( i=0; i<${#local_libs[*]}; i++ )); do + lib_name="${local_libs[i]}" + if `echo ${local_mappings[@]} | grep -wvq $lib_name` ; then + line="$lib_name=xsim.dir/$lib_name" + updated_mappings+=("$line") + fi + done + # Write updated mappings in xsim.ini + rm -f $file + for (( i=0; i<${#updated_mappings[*]}; i++ )); do + lib_name="${updated_mappings[i]}" + echo $lib_name >> $file + done + else + for (( i=0; i<${#local_libs[*]}; i++ )); do + lib_name="${local_libs[i]}" + mapping="$lib_name=xsim.dir/$lib_name" + echo $mapping >> $file + done + fi +} + +# Delete generated data from the previous run +reset_run() +{ + files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb scratchpad.wdb xsim.dir) + for (( i=0; i<${#files_to_remove[*]}; i++ )); do + file="${files_to_remove[i]}" + if [[ -e $file ]]; then + rm -rf $file + fi + done +} + +# Check command line arguments +check_args() +{ + if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then + echo -e "ERROR: Unknown option specified '$2' (type \"./scratchpad.sh -help\" for more information)\n" + exit 1 + fi + + if [[ ($2 == "-help" || $2 == "-h") ]]; then + usage + fi +} + +# Script usage +usage() +{ + msg="Usage: scratchpad.sh [-help]\n\ +Usage: scratchpad.sh [-lib_map_path]\n\ +Usage: scratchpad.sh [-reset_run]\n\ +Usage: scratchpad.sh [-noclean_files]\n\n\ +[-help] -- Print help information for this script\n\n\ +[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ +using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ +[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ +from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ +-noclean_files switch.\n\n\ +[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" + echo -e $msg + exit 1 +} + +# Launch script +run $1 $2 diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/summary.log b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/summary.log new file mode 100755 index 0000000..28dc68a --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/summary.log @@ -0,0 +1,20 @@ + +User Configuration +-------------------------------------------------------------------------------- +Algorithm : Minimum_Area +Memory Type : Single_Port_RAM +Port A Read Width : [32] +Port A Write Width : [32] +Memory Depth : [1024] + +---------------------------------------------------------------------------------- + +Block RAM resource(s) (18K BRAMs) : [0] +Block RAM resource(s) (36K BRAMs) : [1] +---------------------------------------------------------------------------------- +Clock A Frequency : [100] +Port A Enable Rate : [100] +Port A Write Rate : [50] +---------------------------------------------------------------------------------- +Estimated Power for IP : 2.119075 mW +---------------------------------------------------------------------------------- diff --git a/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/vlog.prj b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/vlog.prj new file mode 100644 index 0000000..cd813ef --- /dev/null +++ b/projects/U200/U200.ip_user_files/sim_scripts/scratchpad/xsim/vlog.prj @@ -0,0 +1,6 @@ +verilog xil_defaultlib \ +"../../../../U200.srcs/sources_1/ip/scratchpad/sim/scratchpad.v" \ + +verilog xil_defaultlib "glbl.v" + +nosort |