prebuilt/XCU200/XCU200_C1_UDIMM_1R_x8.ltx


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{
    "ltx_root": {
        "version": 4,
        "minor": 0,
        "ltx_data": [
            {
                "name": "EDA_PROBESET",
                "active": true,
                "debug_cores": [
                    {
                        "type": "XSDB_V3",
                        "name": "dbg_hub",
                        "spec": "labtools_xsdbm_v3",
                        "clk_input_freq_hz": "41670836"
                    },
                    {
                        "type": "XSDBS_V2",
                        "name": "phy_ddr4_i",
                        "spec": "labtools_xsdbslavelib_v2",
                        "ipName": "DDR4_SDRAM",
                        "core_location": {
                            "user_chain": 1,
                            "slave_index": 0,
                            "bscan_switch_index": 0
                        },
                        "uuid": "A4798F5A1DC8569B9C8CB73395566903"
                    }
                ]
            }
        ]
    }
}