| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | XUPP3R_C1_RDIMM_1R_x4.bit | 18669640 | logstatsplainblame |
| -rw-r--r-- | XUPP3R_C1_RDIMM_1R_x4.ltx | 134 | logstatsplainblame |
| -rw-r--r-- | XUPP3R_C1_RDIMM_2R_x8.bit | 18958556 | logstatsplainblame |
| -rw-r--r-- | XUPP3R_C1_RDIMM_2R_x8.ltx | 134 | logstatsplainblame |
| -rw-r--r-- | XUPP3R_C1_UDIMM_1R_x8.bit | 18946148 | logstatsplainblame |
| -rw-r--r-- | XUPP3R_C1_UDIMM_1R_x8.ltx | 134 | logstatsplainblame |
 |
index : dram-bender.git | |
| Experimental FPGA-based DRAM memory controller |
| aboutsummaryrefslogtreecommitdiffstats |