| Mode | Name | Size | |
|---|---|---|---|
| d--------- | bd_0 | 137 | logstatsplain |
| d--------- | ip_0 | 122 | logstatsplain |
| d--------- | ip_1 | 100 | logstatsplain |
| -rw-r--r-- | phy_ddr4_udimm.xci | 73010 | logstatsplainblame |
| -rw-r--r-- | phy_ddr4_udimm.xml | 446137 | logstatsplainblame |
| d--------- | rtl / cal | 30 | logstatsplain |
 |
index : dram-bender.git | |
| Experimental FPGA-based DRAM memory controller |
| aboutsummaryrefslogtreecommitdiffstats |