| Mode | Name | Size | |
|---|---|---|---|
| d--------- | axis_clock_converter | 217 | logstatsplain |
| d--------- | c_counter_binary_0 | 100 | logstatsplain |
| d--------- | cdc_fifo | 169 | logstatsplain |
| d--------- | clk_wiz_0 | 132 | logstatsplain |
| d--------- | cmd_fifo | 169 | logstatsplain |
| d--------- | hbm_0 | 157 | logstatsplain |
| d--------- | instr_blk_mem | 189 | logstatsplain |
| d--------- | instr_blk_mem_sim | 205 | logstatsplain |
| d--------- | pr_read_mem | 181 | logstatsplain |
| d--------- | pr_ref_mem | 177 | logstatsplain |
| d--------- | rdback_fifo | 181 | logstatsplain |
| d--------- | scratchpad | 177 | logstatsplain |
| d--------- | wrdata_fifo | 181 | logstatsplain |
| d--------- | xdma | 153 | logstatsplain |
| d--------- | zq_calib_mem | 185 | logstatsplain |
 |
index : dram-bender.git | |
| Experimental FPGA-based DRAM memory controller |
| aboutsummaryrefslogtreecommitdiffstats |