dma_soft_defines.vh « verilog « hdl « ipstatic « XUPVVH.ip_user_files « XUPVVH « projects - dram-bender.git - Experimental FPGA-based DRAM memory controller

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`ifndef DMA_SOFT_DEFINES_VH
`define DMA_SOFT_DEFINES_VH

`define SOFT_IP

`endif