path: root/projects/XUPVVH/XUPVVH.ip_user_files/sim_scripts/axis_clock_converter/xsim/vlog.prj

verilog xil_defaultlib --include "../../../ipstatic/hdl" \
"../../../../XUPVVH.srcs/sources_1/ip/axis_clock_converter/sim/axis_clock_converter.v" \

verilog xil_defaultlib "glbl.v"

nosort