1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
|
gtwizard_ultrascale_v1_7_gtye4_channel.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/ip_0/sim/gtwizard_ultrascale_v1_7_gtye4_channel.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_gtye4_channel_wrapper.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/ip_0/sim/xdma_pcie4c_ip_gt_gtye4_channel_wrapper.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
gtwizard_ultrascale_v1_7_gtye4_common.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/ip_0/sim/gtwizard_ultrascale_v1_7_gtye4_common.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_gtye4_common_wrapper.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/ip_0/sim/xdma_pcie4c_ip_gt_gtye4_common_wrapper.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_gtwizard_gtye4.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/ip_0/sim/xdma_pcie4c_ip_gt_gtwizard_gtye4.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_gtwizard_top.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/ip_0/sim/xdma_pcie4c_ip_gt_gtwizard_top.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/ip_0/sim/xdma_pcie4c_ip_gt.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_cxs_remap.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_cxs_remap.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_16k_int.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_16k_int.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_16k.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_16k.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_32k.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_32k.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_4k_int.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_4k_int.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_msix.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_msix.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_rep_int.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_rep_int.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_rep.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_rep.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram_tph.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram_tph.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_bram.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_bram.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gtwizard_top.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gtwizard_top.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_phy_ff_chain.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_phy_ff_chain.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_phy_pipeline.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_phy_pipeline.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_gt_channel.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_gt_channel.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_gt_common.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_gt_common.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_phy_clk.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_phy_clk.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_phy_rst.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_phy_rst.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_phy_rxeq.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_phy_rxeq.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_phy_txeq.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_phy_txeq.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_sync_cell.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_sync_cell.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_sync.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_sync.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_cdr_ctrl_on_eidle.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_cdr_ctrl_on_eidle.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_receiver_detect_rxterm.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_receiver_detect_rxterm.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_gt_phy_wrapper.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_gt_phy_wrapper.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_phy_top.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_phy_top.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_init_ctrl.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_init_ctrl.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_pl_eq.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_pl_eq.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_vf_decode.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_vf_decode.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_vf_decode_attr.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_vf_decode_attr.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_pipe.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_pipe.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_seqnum_fifo.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_seqnum_fifo.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_sys_clk_gen_ps.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_sys_clk_gen_ps.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip_pcie4c_uscale_core_top.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source/xdma_pcie4c_ip_pcie4c_uscale_core_top.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_pcie4c_ip.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/sim/xdma_pcie4c_ip.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_v4_1_4_blk_mem_64_reg_be.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_1/sim/xdma_v4_1_4_blk_mem_64_reg_be.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_v4_1_4_blk_mem_64_noreg_be.v,verilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_2/sim/xdma_v4_1_4_blk_mem_64_noreg_be.v,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_dma_bram_wrap.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/xdma_v4_1/hdl/verilog/xdma_dma_bram_wrap.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_dma_bram_wrap_1024.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/xdma_v4_1/hdl/verilog/xdma_dma_bram_wrap_1024.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma_core_top.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/xdma_v4_1/hdl/verilog/xdma_core_top.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
xdma.sv,systemverilog,xil_defaultlib,../../../../XUPVVH.srcs/sources_1/ip/xdma/sim/xdma.sv,incdir="$ref_dir/../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="$ref_dir/../../../ipstatic/hdl/verilog"incdir="../../../../XUPVVH.srcs/sources_1/ip/xdma/ip_0/source"incdir="../../../ipstatic/hdl/verilog"
glbl.v,Verilog,xil_defaultlib,glbl.v
|