| Mode | Name | Size | |
|---|---|---|---|
| d--------- | axis_clock_converter | 301 | logstatsplain |
| d--------- | instr_blk_mem | 301 | logstatsplain |
| d--------- | instr_blk_mem_sim | 301 | logstatsplain |
| d--------- | phy_ddr4 | 301 | logstatsplain |
| d--------- | pr_read_mem | 301 | logstatsplain |
| d--------- | pr_ref_mem | 301 | logstatsplain |
| d--------- | rdback_fifo | 301 | logstatsplain |
| d--------- | scratchpad | 301 | logstatsplain |
| d--------- | xdma | 301 | logstatsplain |
| d--------- | zq_calib_mem | 301 | logstatsplain |
 |
index : dram-bender.git | |
| Experimental FPGA-based DRAM memory controller |
| aboutsummaryrefslogtreecommitdiffstats |