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dram-bender.git
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Experimental FPGA-based DRAM memory controller
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XUSP3R
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XUSP3R.srcs
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sources_1
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ip
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phy_ddr4_x8
Mode
Name
Size
d---------
bd_0
137
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stats
plain
d---------
ip_0
116
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plain
d---------
ip_1
94
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plain
-rw-r--r--
phy_ddr4_x8.xci
51447
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-rw-r--r--
phy_ddr4_x8.xml
435058
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