| Mode | Name | Size | |
|---|---|---|---|
| d--------- | cs1_interleaving_pattern | 144 | logstatsplain |
| d--------- | cs2_data_patterns | 144 | logstatsplain |
| d--------- | cs3_bitwise | 149 | logstatsplain |
 |
index : dram-bender.git | |
| Experimental FPGA-based DRAM memory controller |
| aboutsummaryrefslogtreecommitdiffstats |