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| author | Ataberk Olgun <olgunataberk@users.noreply.github.com> | 2023-05-28 12:10:44 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-05-28 12:10:44 +0200 |
| commit | 0ce1b0d50c53cd1e251b874135812aec3f2fb26c (patch) | |
| tree | 0040bbd9cac4b9a428a2ff36f19990288a63e7da | |
| parent | cf9693829494f3abad0cd9ad8647835447de9492 (diff) | |
| download | dram-bender-0ce1b0d50c53cd1e251b874135812aec3f2fb26c.tar.gz | |
Update README.md to make it clear a programming cable is necessary
| -rw-r--r-- | README.md | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -67,6 +67,7 @@ We plan to open source the following prior research works that used DRAM Bender - A Linux Host Machine, (We tested on Ubuntu 16.04, 18.04, 20.04) - DRAM Bender uses an 8-lane PCIe interface to communicate with the Host Machine. So, you would also need to attach the board to the 8x/16x PCIe slot on the motherboard of the Host Machine - One of the four FPGA boards: Bittware XUSP3S, XUPP3R, XUPVVH, Xilinx Alveo U200 + - These boards should be connected to the host machine via a programming cable. Please refer to manufacturer data sheets for more information on how to use the programming cable. - A proper form factor memory attached to your FPGA board - If you want to build your own bitfile from the source: - Xilinx Vivado 2018.2 for the XUSP3S and XUPP3R boards |
