diff options
Diffstat (limited to 'sources/hdl/header_verilog')
| -rw-r--r-- | sources/hdl/header_verilog/encoding.vh | 10 | ||||
| -rw-r--r-- | sources/hdl/header_verilog/parameters.vh | 3 |
2 files changed, 10 insertions, 3 deletions
diff --git a/sources/hdl/header_verilog/encoding.vh b/sources/hdl/header_verilog/encoding.vh index f5d5697..c0265d6 100644 --- a/sources/hdl/header_verilog/encoding.vh +++ b/sources/hdl/header_verilog/encoding.vh @@ -20,13 +20,15 @@ `define DDR_CODE_OFFSET 12 `define DEC_CAR 4 `define DEC_BAR 0 +`define DEC_SEL_CH 0 `define DEC_RAR 4 `define DEC_INC_BAR 10 `define DEC_PRE_ALL 11 `define DEC_INC_RAR 11 `define DEC_INC_CAR 11 `define DEC_AP 9 -`define DEC_BL4 8 +`define DEC_BL4 8 // deprecated +`define DEC_RANK 8 // function codes - exe `define ADD 0 `define ADDI 1 @@ -54,6 +56,7 @@ `define PRE 2 `define ACT 3 `define ZQ 4 +`define SEL_CH 4 `define REF 5 `define NOP 7 @@ -63,6 +66,7 @@ `define IS_PRE 2 `define IS_ACT 3 `define IS_ZQ 4 +`define IS_SEL_CH 4 `define IS_REF 5 `define CAR 6 // column address register identifier `define RAR 10 // row address register identifier @@ -72,10 +76,12 @@ `define INC_RAR 20 `define INC_BAR 21 `define IS_NOP 22 -`define IS_BL4 23 +`define IS_BL4 23 // deprecated +`define IS_RANK 23 `define DO_AP 24 `define IS_SRE 25 `define IS_SRX 26 +`define HBM_CHANNEL 27 // HBM channel identifier // SoftMC exe uops `define IS_ADD 0 `define IS_SUB 1 diff --git a/sources/hdl/header_verilog/parameters.vh b/sources/hdl/header_verilog/parameters.vh index 916c973..f60c2ad 100644 --- a/sources/hdl/header_verilog/parameters.vh +++ b/sources/hdl/header_verilog/parameters.vh @@ -3,12 +3,13 @@ `define IMEM_ADDR_WIDTH 11 // Decode - Execute -`define DDR_UOP_WIDTH 27 +`define DDR_UOP_WIDTH 31 `define EXE_UOP_WIDTH 62 `define BG_WIDTH 2 `define BANK_WIDTH 2 `define COL_WIDTH 10 `define ROW_WIDTH 17 +`define HBM_CH_WIDTH 4 //Frontend `define XDMA_AXI_DATA_WIDTH 256 |