aboutsummaryrefslogtreecommitdiffstats
path: root/projects/U50-HBM/verilog/project.vh
diff options
context:
space:
mode:
authorAtaberk <olgunataberk@gmail.com>2024-05-02 17:22:05 +0200
committerAtaberk <olgunataberk@gmail.com>2024-05-02 17:22:05 +0200
commit7721980589f4c7fa811689e815a77d63f2556497 (patch)
treeded507bcfb0aeddb7ef647dd3888ef93ff12e630 /projects/U50-HBM/verilog/project.vh
parent82b4ae69fa5fa8728b7aa9a513a9a27fb14a5f78 (diff)
downloaddram-bender-7721980589f4c7fa811689e815a77d63f2556497.tar.gz
Add sources for U50 HBM2
Diffstat (limited to 'projects/U50-HBM/verilog/project.vh')
-rw-r--r--projects/U50-HBM/verilog/project.vh27
1 files changed, 27 insertions, 0 deletions
diff --git a/projects/U50-HBM/verilog/project.vh b/projects/U50-HBM/verilog/project.vh
new file mode 100644
index 0000000..607ddb5
--- /dev/null
+++ b/projects/U50-HBM/verilog/project.vh
@@ -0,0 +1,27 @@
+`define XUPVVH_HBM
+`define HBM_BENDER
+
+// Row Commands
+`define RNOP 0
+`define ACTT 1
+`define PREE 2
+`define PREA 3
+`define REFSB 4
+`define REFF 5
+`define PDE 6
+`define SREE 7
+`define PDX_SRX 8
+// Column Commands
+`define CNOP 9
+`define RD 10
+`define RDA 11
+`define WR 12
+`define WRA 13
+//`define MRS 14
+
+`define ROW_ADDR_WIDTH 14
+`define COL_ADDR_WIDTH 5
+`define BA_ADDR_WIDTH 4
+`define CMD_TYPE_WIDTH 4
+`define PC_WIDTH 1
+`define WR_DATA_WIDTH 256 \ No newline at end of file